The Design, Analysis and Simulation of a Fault-Tolerant Interconnection Network Supporting the Fetch-and-Add Primitive

Authors:
P. Banerjee;A. Dugar
Affiliations:
Univ. of Illinois at Urbana-Champaign, Urbana;Texas Instruments, Inc., Dallas, TX
Venue:
IEEE Transactions on Computers
Year:
1989

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Abstract

The combining multistage interconnection network uses 4*4 switches as switching elements and introduces an extra stage of such switches and links to create four independent paths between any source-destination pair. Four copies of every message are sent through the network simultaneously. The scheduling discipline, the design of the switching elements to support the discipline, and the theoretical proof of correctness of the design constitute the key contributions of this study. Estimates are provided of various network parameters as a function of the workload, using analytical models and detailed network simulations. It is shown that the proposed design for fault tolerance is more cost-effective than the brute-force technique of having multiple copies of the network.