Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
High-density reachability analysis
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
RuleBase: an industry-oriented formal verification tool
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Validation with guided search of the state space
DAC '98 Proceedings of the 35th annual Design Automation Conference
Model checking
Symbolic guided search for CTL model checking
Proceedings of the 37th Annual Design Automation Conference
On-the-Fly Model Checking Under Fairness that Exploits Symmetry
Formal Methods in System Design
SMC: a symmetry-based model checker for verification of safety and liveness properties
ACM Transactions on Software Engineering and Methodology (TOSEM)
Symbolic Model Checking
Another Look at LTL Model Checking
Formal Methods in System Design
From Asymmetry to Full Symmetry: New Techniques for Symmetry Reduction in Model Checking
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
On-the-Fly Model Checking of RCTL Formulas
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Efficient Model Checking by Automated Ordering of Transition Relation Partitions
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Better Verification Through Symmetry
CHDL '93 Proceedings of the 11th IFIP WG10.2 International Conference sponsored by IFIP WG10.2 and in cooperation with IEEE COMPSOC on Computer Hardware Description Languages and their Applications
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Proof-guided underapproximation-widening for multi-process systems
Proceedings of the 32nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Symmetry in temporal logic model checking
ACM Computing Surveys (CSUR)
Underapproximation for model-checking based on universal circuits
Information and Computation
Underapproximation for model-checking based on random cryptographic constructions
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Symmetry reduction for probabilistic model checking
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Symmetry reduction in SAT-based model checking
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Identification and counter abstraction for full virtual symmetry
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
SBMC: symmetric bounded model checking
VECoS'10 Proceedings of the Fourth international conference on Verification and Evaluation of Computer and Communication Systems
Employing symmetry reductions in model checking
Computer Languages, Systems and Structures
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This workp resents a collection of methods, integrating symmetry reduction, under-approximation, and symbolic model checking in order to reduce space and time for model checking. The main goal of this workis falsification. However, under certain conditions our methods provide verification as well.We first present algorithms that perform on-the-fly model checking for temporal safety properties, using symmetry reduction. We then extend these algorithms for checking liveness properties as well.Our methods are fully automatic. The user should supply some basic information about the symmetry in the verified system. However, the methods are robust and workcorrect ly even if the information supplied by the user is incorrect. Moreover, the methods return correct results even in case the computation of the symmetry reduction has not been completed due to memory or time explosion.We implemented our methods within IBM's model checker RuleBase, and compared the performance of our methods with that of RuleBase. In most cases, our algorithms outperformed RuleBase with respect to both time and space.