Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Efficient implementation of a BDD package
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Algorithms for approximate FSM traversal
DAC '93 Proceedings of the 30th international Design Automation Conference
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Protocol Verification as a Hardware Design Aid
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
A Structural Approach to State Space Decomposition for Approximate Reachability Analysis
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
Symbolic optimization of FSM networks based on sequential ATPG techniques
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Improved reachability analysis of large finite state machines
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Decomposed symbolic forward traversals of large finite state machines
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Telescopic units: increasing the average throughput of pipelined designs by adaptive latency control
DAC '97 Proceedings of the 34th annual Design Automation Conference
Linear sifting of decision diagrams
DAC '97 Proceedings of the 34th annual Design Automation Conference
DAC '97 Proceedings of the 34th annual Design Automation Conference
Reachability analysis using partitioned-ROBDDs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Record & play: a structural fixed point iteration for sequential circuit verification
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Approximation and decomposition of binary decision diagrams
DAC '98 Proceedings of the 35th annual Design Automation Conference
Incremental CTL model checking using BDD subsetting
DAC '98 Proceedings of the 35th annual Design Automation Conference
Hybrid verification using saturated simulation
DAC '98 Proceedings of the 35th annual Design Automation Conference
Computational kernels and their application to sequential power optimization
DAC '98 Proceedings of the 35th annual Design Automation Conference
Approximate reachability don't cares for CTL model checking
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Verification by approximate forward and backward reachability
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Decoupling synchronization from local control for efficient symbolic model checking of statecharts
Proceedings of the 21st international conference on Software engineering
Symbolic reachability analysis of large finite state machines using don't cares
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Formal verification in hardware design: a survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Kernel-based power optimization of RTL components: exact and approximate extraction algorithms
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Improving symbolic traversals by means of activity profiles
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Enhancing simulation with BDDs and ATPG
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Distance driven finite state machine traversal
Proceedings of the 37th Annual Design Automation Conference
Probabilistic state space search
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Improving coverage analysis and test generation for large designs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Biasing symbolic search by means of dynamic activity profiles
Proceedings of the conference on Design, automation and test in Europe
Application of linearly transformed BDDs in sequential verification
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
A 3-step approach for performance-driven whole-chip routing
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Optimizing Symbolic Model Checking for Statecharts
IEEE Transactions on Software Engineering - Special issue on 1999 international conference on software engineering
Formal property verification by abstraction refinement with formal, simulation and hybrid engines
Proceedings of the 38th annual Design Automation Conference
On the Effective Deployment of Functional Formal Verification
Formal Methods in System Design
Efficient state representation for symbolic simulation
Proceedings of the 39th annual Design Automation Conference
Combinational and sequential equivalence checking
Logic Synthesis and Verification
Model Checking of Safety Properties
Formal Methods in System Design
SIVA: A System for Coverage-Directed State Space Search
Journal of Electronic Testing: Theory and Applications
Multiple State and Single State Tableaux for Combining Local and Global Model Checking
Correct System Design, Recent Insight and Advances, (to Hans Langmaack on the occasion of his retirement from his professorship at the University of Kiel)
Traversal Techniques for Concurrent Systems
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Branching vs. Linear Time: Final Showdown
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Techniques for Smaller Intermediary BDDs
CONCUR '01 Proceedings of the 12th International Conference on Concurrency Theory
Hints to accelerate Symbolic Traversal
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Integrating BDD-Based and SAT-Based Symbolic Model Checking
FroCoS '02 Proceedings of the 4th International Workshop on Frontiers of Combining Systems
Model Checking of Safety Properties
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Mixing Forward and Backward Traversals in Guided-Prioritized BDD-Based Verification
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Combining Symmetry Reduction and Under-Approximation for Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Stochastic Colored Petri Net Models for Rainbow Optical Networks
Application of Petri Nets to Communication Networks, Advances in Petri Nets
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Proof-guided underapproximation-widening for multi-process systems
Proceedings of the 32nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Compositional SCC Analysis for Language Emptiness
Formal Methods in System Design
Fast falsification based on symbolic bounded property checking
Proceedings of the 43rd annual Design Automation Conference
Combining symmetry reduction and under-approximation for symbolic model checking
Formal Methods in System Design
Decomposing image computation for symbolic reachability analysis using control flow information
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Automated Rule-Based Diagnosis through a Distributed Monitor System
IEEE Transactions on Dependable and Secure Computing
Approximate Compilation of Constraints into Multivalued Decision Diagrams
CP '08 Proceedings of the 14th international conference on Principles and Practice of Constraint Programming
Trading-off SAT search and variable quantifications for effective unbounded model checking
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Survey on Directed Model Checking
Model Checking and Artificial Intelligence
Exploiting Target Enlargement and Dynamic Abstraction within Mixed BDD and SAT Invariant Checking
Electronic Notes in Theoretical Computer Science (ENTCS)
Language-Emptiness Checking of Alternating Tree Automata Using Symbolic Reachability Analysis
Electronic Notes in Theoretical Computer Science (ENTCS)
Distributed Symbolic Bounded Property Checking
Electronic Notes in Theoretical Computer Science (ENTCS)
Underapproximation for model-checking based on universal circuits
Information and Computation
Efficient symbolic state-space construction for asynchronous systems
ICATPN'00 Proceedings of the 21st international conference on Application and theory of petri nets
Underapproximation for model-checking based on random cryptographic constructions
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Simulation vs. formal: absorb what is useful; reject what is useless
HVC'07 Proceedings of the 3rd international Haifa verification conference on Hardware and software: verification and testing
Partitioning interpolant-based verification for effective unbounded model checking
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Parallelizing a symbolic compositional model-checking algorithm
HVC'10 Proceedings of the 6th international conference on Hardware and software: verification and testing
SAT-based semiformal verification of hardware
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
A new reachability algorithm for symmetric multi-processor architecture
ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
Experiments with multiple abstraction heuristics in symbolic verification
SARA'05 Proceedings of the 6th international conference on Abstraction, Reformulation and Approximation
Abstraction-Guided model checking using symbolic IDA* and heuristic synthesis
FORTE'05 Proceedings of the 25th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
A fine-grained fullness-guided chaining heuristic for symbolic reachability analysis
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
Searching for counter-examples adaptively
IWFM'03 Proceedings of the 6th international conference on Formal Methods
Generating concise assertions with complete coverage
Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI
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We address the problem of reachability analysis for large finite state systems. Symbolic techniques have revolutionized reachability analysis but still have limitations in traversing large systems. We present techniques to improve the symbolic breadth-first traversal and compute a lower bound on the reachable states. We identify the problem as one of density during traversal and our techniques seek to improve the same. Our results show a marked improvement on the existing breadth-first traversal methods.