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IEEE Transactions on Computers
Statecharts: A visual formalism for complex systems
Science of Computer Programming
Characterizing finite Kripke structures in propositional temporal logic
Theoretical Computer Science - International Joint Conference on Theory and Practice of Software Development, P
Interprocedural slicing using dependence graphs
ACM Transactions on Programming Languages and Systems (TOPLAS)
The ESTEREL synchronous programming language: design, semantics, implementation
Science of Computer Programming
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
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ACM Transactions on Programming Languages and Systems (TOPLAS)
Requirements Specification for Process-Control Systems
IEEE Transactions on Software Engineering
High-density reachability analysis
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Completeness and Consistency in Hierarchical State-Based Requirements
IEEE Transactions on Software Engineering - Special issue: best papers of the 17th International Conference on Software Engineering (ICSE-17)
The STATEMATE semantics of statecharts
ACM Transactions on Software Engineering and Methodology (TOSEM)
Exploiting symmetry in temporal logic model checking
Formal Methods in System Design - Special issue on symmetry in automatic verification
CTL model checking based on forward state traversal
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Improved reachability analysis of large finite state machines
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
DAC '97 Proceedings of the 34th annual Design Automation Conference
Reduction and slicing of hierarchical state machines
ESEC '97/FSE-5 Proceedings of the 6th European SOFTWARE ENGINEERING conference held jointly with the 5th ACM SIGSOFT international symposium on Foundations of software engineering
Improving efficiency of symbolic model checking for state-based system requirements
Proceedings of the 1998 ACM SIGSOFT international symposium on Software testing and analysis
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ACM Transactions on Software Engineering and Methodology (TOSEM)
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ESEC/FSE-7 Proceedings of the 7th European software engineering conference held jointly with the 7th ACM SIGSOFT international symposium on Foundations of software engineering
POPL '77 Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
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IEEE Transactions on Software Engineering
Efficient State Space Pruning in Symbolic Backward Traversal
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
Partial-Order Reduction in Symbolic State Space Exploration
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
On-the-Fly Model Checking of RCTL Formulas
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Efficient Model Checking by Automated Ordering of Transition Relation Partitions
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
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CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
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ICRE '96 Proceedings of the 2nd International Conference on Requirements Engineering (ICRE '96)
Safety Patterns - The Key to Formal Specification of Safety Requirements
SAFECOMP '01 Proceedings of the 20th International Conference on Computer Safety, Reliability and Security
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IEEE Transactions on Software Engineering
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eclipse '04 Proceedings of the 2004 OOPSLA workshop on eclipse technology eXchange
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Journal of Systems and Software - Special issue: Selected papers from the 4th source code analysis and manipulation (SCAM 2004) workshop
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ISoLA'04 Proceedings of the First international conference on Leveraging Applications of Formal Methods
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CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
State-based model slicing: A survey
ACM Computing Surveys (CSUR)
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Symbolic model checking based on binary decision diagrams is a powerful formal verification technique for reactive systems. In this paper, we present various optimizations for improving the time and space efficiency of symbolic model checking for systems specified as statecharts. We used these techniques in our analyses of the models of a collision avoidance system and a fault-tolerant electrical power distribution (EPD) system, both used on commercial aircraft. The techniques together reduce the time and space requirements by orders of magnitude, making feasible some analysis that was previously intractable. We also elaborate on the results of verifying the EPD model. The analysis disclosed subtle modeling and logical flaws not found by simulation.