Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Model checking
Optimizing Symbolic Model Checking for Statecharts
IEEE Transactions on Software Engineering - Special issue on 1999 international conference on software engineering
A hybrid verification approach: getting deep into the design
Proceedings of the 39th annual Design Automation Conference
Symbolic Model Checking
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Optimizing Symbolic Model Checking for Constraint-Rich Models
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Abstract and Model Check While You Prove
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
A Methodology for Proving Control Systems with Lustre and PVS
DCCA '99 Proceedings of the conference on Dependable Computing for Critical Applications
Experimental analysis of different techniques for bounded model checking
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
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We present combination model checking approach using a SAT-based bounded model checker together with a BDD-based symbolic model checker to provide a more efficient counter example generation process. We provide this capability without compromising the verification capability of the symbolic model checker. The basic idea is to use the symbolic model checker to determine whether or not a property holds in the model. If the property holds, we are done. If it does not, we preempt the counterexample generation and use the SAT-based model checker for this purpose. An application of the combination approach to a version of a Flight Guidance System (FGS) from Rockwell Collins, Inc. shows huge performance gain when checking a collection of several hundred properties.