Verification of synchronous sequential machines based on symbolic execution
Proceedings of the international workshop on Automatic verification methods for finite state systems
Symbolic simulation—techniques and applications
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Algorithms for approximate FSM traversal
DAC '93 Proceedings of the 30th international Design Automation Conference
Symbolic exploration of large circuits with enhanced forward/backward traversals
EURO-DAC '94 Proceedings of the conference on European design automation
Architecture validation for processors
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
High-density reachability analysis
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Algebraic decision diagrams and their applications
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Approximate reachability with BDDs using overlapping projections
DAC '98 Proceedings of the 35th annual Design Automation Conference
Validation with guided search of the state space
DAC '98 Proceedings of the 35th annual Design Automation Conference
Dynamic Programming and Optimal Control
Dynamic Programming and Optimal Control
On Limits and Possibilities of Automated Protocol Analysis
Proceedings of the IFIP WG6.1 Seventh International Conference on Protocol Specification, Testing and Verification VII
On Combining Formal and Informal Verification
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Rarity based guided state space search
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
Effective safety property checking using simulation-based sequential ATPG
Proceedings of the 39th annual Design Automation Conference
Random walks in a supply network
Proceedings of the 40th annual Design Automation Conference
Property-Specific Testbench Generation for Guided Simulation
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Enhancing random walk state space exploration
Proceedings of the 10th international workshop on Formal methods for industrial critical systems
Distance-guided hybrid verification with GUIDO
Proceedings of the conference on Design, automation and test in Europe: Proceedings
A Survey of Hybrid Techniques for Functional Verification
IEEE Design & Test
Hybrid Verification of Protocol Bridges
IEEE Design & Test
An effective guidance strategy for abstraction-guided simulation
Proceedings of the 44th annual Design Automation Conference
Resource-Aware Verification Using Randomized Exploration of Large State Spaces
SPIN '08 Proceedings of the 15th international workshop on Model Checking Software
Simulation vs. formal: absorb what is useful; reject what is useless
HVC'07 Proceedings of the 3rd international Haifa verification conference on Hardware and software: verification and testing
SAT-based semiformal verification of hardware
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
RAID'06 Proceedings of the 9th international conference on Recent Advances in Intrusion Detection
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This paper describes a probabilistic approach to state space search. The presented method applies a ranking of the design states according to their probability of reaching a given target state based on a random walk model. This ranking can be used to prioritize an explicit or partial symbolic state exploration to find a trajectory from a set of initial states to a set of target states. A symbolic technique for estimating the reachability probability is described which implements a smooth trade-off between accuracy and computing effort. The presented probabilistic state space search complements incomplete verification methods which are specialized in finding errors in large designs.