Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Validation with guided search of the state space
DAC '98 Proceedings of the 35th annual Design Automation Conference
Enhancing simulation with BDDs and ATPG
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Probabilistic state space search
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Automatic lighthouse generation for directed state space search
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Constraint synthesis for environment modeling in functional verification
Proceedings of the 40th annual Design Automation Conference
On the complexity of modular model checking
LICS '95 Proceedings of the 10th Annual IEEE Symposium on Logic in Computer Science
Combining Simulation and Guided Traversal for the Verification of Concurrent Systems
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
IODINE: a tool to automatically infer dynamic invariants for hardware designs
Proceedings of the 42nd annual Design Automation Conference
Distance-guided hybrid verification with GUIDO
Proceedings of the conference on Design, automation and test in Europe: Proceedings
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It is becoming increasingly more evident that simulation cannot provide full verification for today's complex designs. Formal verification is emerging as an alternative technique to simulation that promises to guarantee complete verification. However, because of its inability to handle all classes and sizes of designs, this technology is also incomplete. The solution is to combine the two complementary techniques, using their respective strengths. The authors of this article have developed such a technique for hybrid verification. They illustrate its application through two case studies in protocol bridge verification. In both designs, the hybrid technique was able to discover bugs that simulation and formal verification had failed to find individually.