Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Efficient implementation of a BDD package
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Model checking and abstraction
POPL '92 Proceedings of the 19th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Edge-valued binary decision diagrams for multi-level hierarchical verification
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
A new model for improving symbolic product machine traversal
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Algorithms for approximate FSM traversal
DAC '93 Proceedings of the 30th international Design Automation Conference
Zero-suppressed BDDs for set manipulation in combinatorial problems
DAC '93 Proceedings of the 30th international Design Automation Conference
Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
Efficient OBDD-based boolean manipulation in CAD beyond current limits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Verification of arithmetic circuits with binary moment diagrams
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Who are the variables in your neighborhood
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
High-density reachability analysis
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Synthesis by spectral translation using Boolean decision diagrams
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Sequential Circuit Design Using Synthesis and Optimization
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Local Encoding Transformations for Optimizing OBDD-Representations of Finite State Machines
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
On variable ordering of binary decision diagrams for the application of multi-level logic synthesis
EURO-DAC '91 Proceedings of the conference on European design automation
Efficient manipulation algorithms for linearly transformed BDDs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Local Encoding Transformations for Optimizing OBDD-Representations of Finite State Machines
Formal Methods in System Design
Ordered binary decision diagrams
Logic Synthesis and Verification
A Comparison of Free BDDs and Transformed BDDs
Formal Methods in System Design
Data structures for Boolean functions
Computational Discrete Mathematics
Lower bounds for linearly transformed OBDDs and FBDDs
Journal of Computer and System Sciences
Lower Bounds for Linear Transformed OBDDs and FBDDs (Extende Abstract)
Proceedings of the 19th Conference on Foundations of Software Technology and Theoretical Computer Science
Learning to order BDD variables in verification
Journal of Artificial Intelligence Research
Biconditional BDD: a novel canonical BDD for logic synthesis targeting XOR-rich circuits
Proceedings of the Conference on Design, Automation and Test in Europe
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We propose a new algorithm, called linear sifting, for theoptimization of decision diagrams that combines the efficiency of sifting and the power of linear transformations. We show that the new algorithm is applicable to large examples, and that inmany cases it leads to substantiallymore compact diagrams when compared to simple variablereordering. We show inwhat sense linear transformationscomplement variable reordering, and we discuss applications of the new technique to synthesis and verification.