Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Sequential circuit verification using symbolic model checking
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Representing circuits more efficiently in symbolic model checking
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Algorithms for approximate FSM traversal
DAC '93 Proceedings of the 30th international Design Automation Conference
Who are the variables in your neighborhood
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
High-density reachability analysis
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
MORE: an alternative implementation of BDD packages by multi-operand synthesis
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
DAC '97 Proceedings of the 34th annual Design Automation Conference
Reachability analysis using partitioned-ROBDDs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Improving symbolic traversals by means of activity profiles
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
To split or to conjoin: the question in image computation
Proceedings of the 37th Annual Design Automation Conference
Distance driven finite state machine traversal
Proceedings of the 37th Annual Design Automation Conference
Lazy group sifting for efficient symbolic state traversal of FSMs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Efficient manipulation algorithms for linearly transformed BDDs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
On the computational power of linearly transformed BDDs
Information Processing Letters
Symbolic Model Checking
Local Encoding Transformations for Optimizing OBDD-Representations of Finite State Machines
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
A Performance Study of BDD-Based Model Checking
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Linear sifting of decision diagrams and its application in synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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The computation of the set of reachable states is the key problem of many applications in sequential verification. Binary Decision Diagrams (BDDs) are extensively used in this domain, but tend to blow up for larger instances. To increase the computational power of BDDs, linearly transformed BDDS (LTBDDs) have been proposed. In this paper we show how this concept can be incorporated into the sequential verification domain by restricting dynamic reordering in a way that the relational product can still be carried out efficiently. Experimental results are given to show the efficiency of our approach.