Binary decision diagrams and beyond: enabling technologies for formal verification
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
High performance BDD package by exploiting memory hierarchy
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Remembrance of things past: locality and memory in BDDs
DAC '97 Proceedings of the 34th annual Design Automation Conference
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FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
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DATE '99 Proceedings of the conference on Design, automation and test in Europe
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ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
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Proceedings of the 2001 Asia and South Pacific Design Automation Conference
sub-SAT: a formulation for relaxed boolean satisfiability with applications in routing
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BDD-Nodes Can Be More Expressive
ASIAN '99 Proceedings of the 5th Asian Computing Science Conference on Advances in Computing Science
Saturation: An Efficient Iteration Strategy for Symbolic State-Space Generation
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
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SAS '02 Proceedings of the 9th International Symposium on Static Analysis
Improvements in BDD-Based Reachability Analysis of Timed Automata
FME '01 Proceedings of the International Symposium of Formal Methods Europe on Formal Methods for Increasing Software Productivity
Optimizing Symbolic Model Checking for Constraint-Rich Models
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
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Experimental algorithmics
Counterexample-guided abstraction refinement for symbolic model checking
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Conformant planning via symbolic model checking and heuristic search
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An analytical model for software-only main memory compression
WMPI '04 Proceedings of the 3rd workshop on Memory performance issues: in conjunction with the 31st international symposium on computer architecture
Application of Wu's method to symbolic model checking
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Strong planning under partial observability
Artificial Intelligence
Data structures for symbolic multi-valued model-checking
Formal Methods in System Design
Adaptive main memory compression
ATEC '05 Proceedings of the annual conference on USENIX Annual Technical Conference
Conformant planning via symbolic model checking
Journal of Artificial Intelligence Research
Strong planning under partial observability
Artificial Intelligence
Type inference for datalog with complex type hierarchies
Proceedings of the 37th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
A generic on-the-fly solver for alternation-free boolean equation systems
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
A BDD-Like implementation of an automata package
CIAA'04 Proceedings of the 9th international conference on Implementation and Application of Automata
CacBDD: a BDD package with dynamic cache management
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
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We present a study of the computational aspects of model checking based on binary decision diagrams (BDDs). By using a trace-based evaluation framework, we are able to generate realistic benchmarks and perform this evaluation collaboratively across several different BDD packages. This collaboration has resulted in significant performance improvements and in the discovery of several interesting characteristics of model checking computations. One of the main conclusions of this work is that the BDD computations in model checking and in building BDDs for the outputs of combinational circuits have fundamentally different performance characteristics. The systematic evaluation has also uncovered several open issues that suggest new research directions. We hope that the evaluation methodology used in this study will help lay the foundation for future evaluation of BDD-based algorithms.