Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Adaptive variable reordering for symbolic model checking
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Sampling schemes for computing OBDD variable orderings
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Symbolic Model Checking
A Performance Study of BDD-Based Model Checking
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Speeding up variable reordering of OBDDs
ICCD '97 Proceedings of the 1997 International Conference on Computer Design (ICCD '97)
Ordered binary decision diagrams
Logic Synthesis and Verification
Data structures for Boolean functions
Computational Discrete Mathematics
Algorithms and heuristics in VLSI design
Experimental algorithmics
A Novel SAT All-Solutions Solver for Efficient Preimage Computation
Proceedings of the conference on Design, automation and test in Europe - Volume 1
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Symbolic Model checking is a widely used technique in sequential verification. As the size of the OBDDs and also the computation time depends on the order of the input variables, the verification may only succeed if a well suited variable order is chosen. Since the characteristics of the represented functions are changing, the variable order has to be adapted dynamically. Unfortunately, dynamic reordering strategies are often very time consuming and sometimes do not provide any improvement of the OBDD representation. This paper presents adaptions of reordering techniques originally intended for combinatorial verification to the specific requirements of symbolic model checking. The techniques are orthogonal in the way that they use either structural information about the OBDDs or semantical information about the represented functions. The application of these techniques substantially accelerates the reordering process and makes it possible to finish computations, that are too time consuming, otherwise.