Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Symbolic Boolean manipulation with ordered binary-decision diagrams
ACM Computing Surveys (CSUR)
Symbolic model checking: an approach to the state explosion problem
Symbolic model checking: an approach to the state explosion problem
The concurrency workbench: a semantics-based tool for the verification of concurrent systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Efficient breadth-first manipulation of binary decision diagrams
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Model checking
Efficient encoding schemes for symbolic analysis of petri nets
Proceedings of the conference on Design, automation and test in Europe
Handbook of Process Algebra
A Tutorial on Stålmarck‘s Proof Procedure for PropositionalLogic
Formal Methods in System Design - Special issue on formal methods for computer-added design
A Performance Study of BDD-Based Model Checking
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Partial Model Checking with ROBDDs
TACAS '97 Proceedings of the Third International Workshop on Tools and Algorithms for Construction and Analysis of Systems
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Symbolic Reachability Analysis Based on SAT-Solvers
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Partial-Order Reduction in Symbolic State Space Exploration
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
NUSMV: A New Symbolic Model Verifier
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Efficient Reachability Set Generation and Storage Using Decision Diagrams
Proceedings of the 20th International Conference on Application and Theory of Petri Nets
A Conjunctively Decomposed Boolean Representation for Symbolic Model Checking
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Petri Net Analysis Using Boolean Manipulation
Proceedings of the 15th International Conference on Application and Theory of Petri Nets
Compositional and symbolic model-checking of real-time systems
RTSS '95 Proceedings of the 16th IEEE Real-Time Systems Symposium
SMART: Simulation and Markovian Analyzer for Reliability and Timing
IPDS '96 Proceedings of the 2nd International Computer Performance and Dependability Symposium (IPDS '96)
Efficient symbolic state-space construction for asynchronous systems
ICATPN'00 Proceedings of the 21st international conference on Application and theory of petri nets
Distributed and structured analysis approaches to study large and complex systems
Lectures on formal methods and performance analysis
Hierarchical Reachability Graph Generation for Petri Nets
Formal Methods in System Design
Using Edge-Valued Decision Diagrams for Symbolic Generation of Shortest Paths
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Implicit GSPN reachability set generation using decision diagrams
Performance Evaluation - Dependable systems and networks-performance and dependability symposium (DSN-PDS) 2002: Selected papers
Model-Based Evaluation: From Dependability to Security
IEEE Transactions on Dependable and Secure Computing
Implicit data structures for logic and stochastic systems analysis
ACM SIGMETRICS Performance Evaluation Review
Logic and stochastic modeling with SMART
Performance Evaluation - Modelling techniques and tools for computer performance evaluation
Saturation for a General Class of Models
IEEE Transactions on Software Engineering
Exploiting interleaving semantics in symbolic state-space generation
Formal Methods in System Design
Measuring and Evaluating Parallel State-Space Exploration Algorithms
Electronic Notes in Theoretical Computer Science (ENTCS)
Challenges in transformation of existing real-time embedded systems to cyber-physical systems
ACM SIGBED Review - Special issue on the RTSS forum on deeply embedded real-time computing
Model-Checking the Linux Virtual File System
VMCAI '09 Proceedings of the 10th International Conference on Verification, Model Checking, and Abstract Interpretation
Symbolic Reachability Analysis of Integer Timed Petri Nets
SOFSEM '09 Proceedings of the 35th Conference on Current Trends in Theory and Practice of Computer Science
Advanced features in SMART: the stochastic model checking analyzer for reliability and timing
ACM SIGMETRICS Performance Evaluation Review
EPEW '09 Proceedings of the 6th European Performance Engineering Workshop on Computer Performance Engineering
Symbolic CTL Model Checking of Asynchronous Systems Using Constrained Saturation
ATVA '09 Proceedings of the 7th International Symposium on Automated Technology for Verification and Analysis
Formal Verification of the NASA Runway Safety Monitor
Electronic Notes in Theoretical Computer Science (ENTCS)
Electronic Notes in Theoretical Computer Science (ENTCS)
Can saturation be parallelised?: on the parallelisation of a symbolic state-space generator
FMICS'06/PDMC'06 Proceedings of the 11th international workshop, FMICS 2006 and 5th international workshop, PDMC conference on Formal methods: Applications and technology
Bounded reachability checking of asynchronous systems using decision diagrams
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
Improving static variable orders via invariants
ICATPN'07 Proceedings of the 28th international conference on Applications and theory of Petri nets and other models of concurrency
Parallelising symbolic state-space generators
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Verification of software via integration of design and implementation
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
A dynamic firing speculation to speedup distributed symbolic state-space generation
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Saturation-based symbolic reachability analysis using conjunctive and disjunctive partitioning
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
A fine-grained fullness-guided chaining heuristic for symbolic reachability analysis
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
New metrics for static variable ordering in decision diagrams
TACAS'06 Proceedings of the 12th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Ten years of saturation: a petri net perspective
Transactions on Petri Nets and Other Models of Concurrency V
Computing a hierarchical static order for decision diagram-based representation from p/t nets
Transactions on Petri Nets and Other Models of Concurrency V
BDD-based Bounded Model Checking for Temporal Properties of 1-Safe Petri Nets
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P)
High-Level Petri Net Model Checking with AlPiNA
Fundamenta Informaticae - Applications and Theory of Petri Nets and Other Models of Concurrency, 2010
A CTL model checker for stochastic automata networks
QEST'13 Proceedings of the 10th international conference on Quantitative Evaluation of Systems
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We present a novel algorithm for generating state spaces of asynchronous systems using Multi-valued Decision Diagrams. In contrast to related work, we encode the next-state function of a system not as a single Boolean function, but as cross-products of integer functions. This permits the application of various iteration strategies to build a system's state space. In particular, we introduce a new elegant strategy, called saturation, and implement it in the tool SMART. On top of usually performing several orders of magnitude faster than existing BDD-based state-space generators, our algorithm's required peak memory is often close to the final memory needed for storing the overall state space.