A time abstraction method for efficient verification of communicating systems
DAC '94 Proceedings of the 31st annual Design Automation Conference
Verus: a tool for quantitative analysis of finite-state real-time systems
LCTES '95 Proceedings of the ACM SIGPLAN 1995 workshop on Languages, compilers, & tools for real-time systems
Efficient generation of counterexamples and witnesses in symbolic model checking
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Model checking software systems: a case study
SIGSOFT '95 Proceedings of the 3rd ACM SIGSOFT symposium on Foundations of software engineering
A formal technique for automated dialogue development
Proceedings of the 1st conference on Designing interactive systems: processes, practices, methods, & techniques
A logic-model semantics for SCR software requirements
ISSTA '96 Proceedings of the 1996 ACM SIGSOFT international symposium on Software testing and analysis
Verification techniques for cache coherence protocols
ACM Computing Surveys (CSUR)
Model-checking of real-time systems: a telecommunications application: experience report
ICSE '97 Proceedings of the 19th international conference on Software engineering
Representation and symbolic manipulation of linearly inductive Boolean functions
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Formal verification of content addressable memories using symbolic trajectory evaluation
DAC '97 Proceedings of the 34th annual Design Automation Conference
Accounting for various register allocation schemes during post-synthesis verification of RTL designs
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Formal verification in hardware design: a survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Specification and verification of fault-tolerance, timing, and scheduling
ACM Transactions on Programming Languages and Systems (TOPLAS)
Proceedings of the 37th Annual Design Automation Conference
A note on the complexity of propositional Hoare logic
ACM Transactions on Computational Logic (TOCL)
Proceedings of the 3rd ACM international workshop on Data warehousing and OLAP
Ninth International Conference on Information and Knowledge Management
Selective Quantitative Analysis and Interval Model Checking: Verifying Different Facets of a System
Formal Methods in System Design
A component-based approach to building formal analysis tools
ICSE '01 Proceedings of the 23rd International Conference on Software Engineering
Apportioning: A Technique for Efficient Reachability Analysis of Concurrent Object-Oriented Programs
IEEE Transactions on Software Engineering - Special section on the seventh international software metrics symposium
Silicon Debug of a PowerPC™ Microprocessor Using Model Checking
Formal Methods in System Design
Why is Combinational ATPG Efficiently Solvable for Practical VLSI Circuits?
Journal of Electronic Testing: Theory and Applications
L.0: A Truly Concurrent Executable Temporal Logic Language for Protocols
IEEE Transactions on Software Engineering
Counter machines and verification Problems
Theoretical Computer Science
Formal Verification of Coherence for a Shared Memory Multiprocessor Model
PaCT '01 Proceedings of the 6th International Conference on Parallel Computing Technologies
Characterizing Timed Net Processes Categorically
PaCT '01 Proceedings of the 6th International Conference on Parallel Computing Technologies
Analyzing Mode Confusion via Model Checking
Proceedings of the 5th and 6th International SPIN Workshops on Theoretical and Practical Aspects of SPIN Model Checking
Bytecode Model Checking: An Experimental Analysis
Proceedings of the 9th International SPIN Workshop on Model Checking of Software
Detecting Termination of Active Database Rules Using Symbolic Model Checking
ADBIS '01 Proceedings of the 5th East European Conference on Advances in Databases and Information Systems
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Model Reductions and a Case Study
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
A Fixpoint Based Encoding for Bounded Model Checking
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
A Formal Methodology to Specify E-commerce Systems
ICFEM '02 Proceedings of the 4th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
On Removing the Pushdown Stack in Reachability Constructions
ISAAC '01 Proceedings of the 12th International Symposium on Algorithms and Computation
Saturation: An Efficient Iteration Strategy for Symbolic State-Space Generation
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Calculational Reasoning Revisited (An Isabelle/Isar Experience)
TPHOLs '01 Proceedings of the 14th International Conference on Theorem Proving in Higher Order Logics
Model Checking of Time Petri Nets Based on Partial Order Semantics
CONCUR '99 Proceedings of the 10th International Conference on Concurrency Theory
From Asymmetry to Full Symmetry: New Techniques for Symmetry Reduction in Model Checking
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
A Compositional Real-Time Semantics of STATEMATE Designs
COMPOS'97 Revised Lectures from the International Symposium on Compositionality: The Significant Difference
Liveness Verification of Reversal-Bounded Multicounter Machines with a Free Counter
FST TCS '01 Proceedings of the 21st Conference on Foundations of Software Technology and Theoretical Computer Science
Alias Analysis by Means of a Model Checker
CC '01 Proceedings of the 10th International Conference on Compiler Construction
Improvements in BDD-Based Reachability Analysis of Timed Automata
FME '01 Proceedings of the International Symposium of Formal Methods Europe on Formal Methods for Increasing Software Productivity
Proofs of Correctness of Cache-Coherence Protocols
FME '01 Proceedings of the International Symposium of Formal Methods Europe on Formal Methods for Increasing Software Productivity
Computing a Finite Prefix of a Time Petri Net
ICATPN '02 Proceedings of the 23rd International Conference on Applications and Theory of Petri Nets
Model Checking: Historical Perspective and Example (Extended Abstract)
TABLEAUX '98 Proceedings of the International Conference on Automated Reasoning with Analytic Tableaux and Related Methods
Verification in loosely synchronous queue-connected discrete timed automata
Theoretical Computer Science
Eliminating the storage tape in reachability constructions
Theoretical Computer Science
Using Partial Orders For Trace Theoretic Verification Of Asynchronous Circuits
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Verifying real-time properties of MOS-transistor circuits
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Transformations for functional verification of synthesized designs
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
A study of composition schemes for mixed apply/compose based construction of ROBDDs
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Automatic verification of industrial designs
WIFT '95 Proceedings of the 1st Workshop on Industrial-Strength Formal Specification Techniques
Timing analysis of industrial real-time systems
WIFT '95 Proceedings of the 1st Workshop on Industrial-Strength Formal Specification Techniques
Analyzing a PowerPC" 620 Microprocessor Silicon Failure using Model Checking
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Requirements interaction management
ACM Computing Surveys (CSUR)
An integrated environment for HDL verification
IVC '95 Proceedings of the 4th IEEE International Verilog HDL Conference
Bytecode Verification by Model Checking
Journal of Automated Reasoning
Introduction to generalized symbolic trajectory evaluation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Point algebras for temporal reasoning: algorithms and complexity
Artificial Intelligence
Verification of the Futurebus+ cache coherence protocol: a case study in model checking
ACSC '04 Proceedings of the 27th Australasian conference on Computer science - Volume 26
An Approach to the Verification of Symmetric Parameterized Distributed Systems
Programming and Computing Software
Merged processes: a new condensed representation of Petri net behaviour
CONCUR 2005 - Concurrency Theory
A comparison of BDDs, BMC, and sequential SAT for model checking
HLDVT '03 Proceedings of the Eighth IEEE International Workshop on High-Level Design Validation and Test Workshop
Logic synthesis for asynchronous circuits based on STG unfoldings and incremental SAT
Fundamenta Informaticae - Special issue on application of concurrency to system design (ACSD'04)
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
Analyzing static and temporal properties of simulation models
Proceedings of the 38th conference on Winter simulation
Detecting State Encoding Conflicts in STG Unfoldings Using SAT
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'03)
Verification of bounded Petri nets using integer programming
Formal Methods in System Design
An Integrated Methodology for the Verification of Directory-Based Cache Protocols
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
Model checking electronic commerce protocols
WOEC'96 Proceedings of the 2nd conference on Proceedings of the Second USENIX Workshop on Electronic Commerce - Volume 2
Exploiting interleaving semantics in symbolic state-space generation
Formal Methods in System Design
Trellis Processes: A Compact Representation for Runs of Concurrent Systems
Discrete Event Dynamic Systems
Partial Order Techniques for Distributed Discrete Event Systems: Why You Cannot Avoid Using Them
Discrete Event Dynamic Systems
On the use of organisation modelling techniques to address biological organisation
Multiagent and Grid Systems - Multi-agent systems for medicine, computational biology, and bioinformatics
Extracting Zing Models from C Source Code
SOFSEM '07 Proceedings of the 33rd conference on Current Trends in Theory and Practice of Computer Science
Testing Distributed Systems Through Symbolic Model Checking
FORTE '07 Proceedings of the 27th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Fifteen Years of Formal Property Verification in Intel
25 Years of Model Checking
Getting Formal Verification into Design Flow
FM '08 Proceedings of the 15th international symposium on Formal Methods
Tools for analyzing intelligent agent systems
Web Intelligence and Agent Systems
Planning as model checking: the performance of ProB vs NuSMV
Proceedings of the 2008 annual research conference of the South African Institute of Computer Scientists and Information Technologists on IT research in developing countries: riding the wave of technology
Specifying behavioral semantics of UML diagrams through graph transformations
Journal of Systems and Software
Electronic Notes in Theoretical Computer Science (ENTCS)
GenLM: License Management for Grid and Cloud Computing Environments
CCGRID '09 Proceedings of the 2009 9th IEEE/ACM International Symposium on Cluster Computing and the Grid
A new formalism for mathematical description and verification of component-based systems
The Journal of Supercomputing
A Term Rewriting Technique for Decision Graphs
Electronic Notes in Theoretical Computer Science (ENTCS)
Automated interface refinement for compositional verification
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Modular Construction of Finite and Complete Prefixes of Petri net Unfoldings
Fundamenta Informaticae - Application of Concurrency to System Design
Formal Analysis of Dynamics within Philosophy of Mind by Computer Simulation
Minds and Machines
Symbolic CTL Model Checking of Asynchronous Systems Using Constrained Saturation
ATVA '09 Proceedings of the 7th International Symposium on Automated Technology for Verification and Analysis
Automated verification of security pattern compositions
Information and Software Technology
ICATPN'03 Proceedings of the 24th international conference on Applications and theory of Petri nets
Rewrite rules and operational semantics for model checking UML statecharts
UML'00 Proceedings of the 3rd international conference on The unified modeling language: advancing the standard
Improving static variable orders via invariants
ICATPN'07 Proceedings of the 28th international conference on Applications and theory of Petri nets and other models of concurrency
Verifying temporal properties of community designs
IFM'07 Proceedings of the 6th international conference on Integrated formal methods
On the complexity monotonicity thesis for environment, behaviour and cognition
DALT'07 Proceedings of the 5th international conference on Declarative agent languages and technologies V
Cover algorithms and their combination
ESOP'08/ETAPS'08 Proceedings of the Theory and practice of software, 17th European conference on Programming languages and systems
Distributed BDD-based BMC for the verification of multi-agent systems
Proceedings of the 9th International Conference on Autonomous Agents and Multiagent Systems: volume 1 - Volume 1
Formal analysis of design process dynamics
Artificial Intelligence for Engineering Design, Analysis and Manufacturing
Symbolic model checking in practice
SBCCI'99 Proceedings of the XIIth conference on Integrated circuits and systems design
UTP and temporal logic model checking
UTP'08 Proceedings of the 2nd international conference on Unifying theories of programming
Patterns in world dynamics indicating agency
Transactions on computational collective intelligence III
An algorithm for direct construction of complete merged processes
PETRI NETS'11 Proceedings of the 32nd international conference on Applications and theory of Petri Nets
Abstraction and refinement in model checking
FMCO'05 Proceedings of the 4th international conference on Formal Methods for Components and Objects
Formal proof of impossibility of reliability in crashing protocols
IWDC'04 Proceedings of the 6th international conference on Distributed Computing
A fibred belief logic for multi-agent systems
AI'05 Proceedings of the 18th Australian Joint conference on Advances in Artificial Intelligence
Model-checking timed ATL for durational concurrent game structures
FORMATS'06 Proceedings of the 4th international conference on Formal Modeling and Analysis of Timed Systems
EUC'05 Proceedings of the 2005 international conference on Embedded and Ubiquitous Computing
Modeling asynchronous message passing for c programs
VMCAI'12 Proceedings of the 13th international conference on Verification, Model Checking, and Abstract Interpretation
Hardware dependability in the presence of soft errors
VoCS'08 Proceedings of the 2008 international conference on Visions of Computer Science: BCS International Academic Conference
Formalizing non-concurrent UML state machines using colored petri nets
ACM SIGSOFT Software Engineering Notes
Survey: Linear Temporal Logic Symbolic Model Checking
Computer Science Review
Designing fast LTL model checking algorithms for many-core GPUs
Journal of Parallel and Distributed Computing
Modular Construction of Finite and Complete Prefixes of Petri net Unfoldings
Fundamenta Informaticae - Application of Concurrency to System Design
Logic Synthesis for Asynchronous Circuits Based on STG Unfoldings and Incremental SAT
Fundamenta Informaticae - APPLICATION OF CONCURRENCY TO SYSTEM DESIGN (ACSD'04)
Detecting State Encoding Conflicts in STG Unfoldings Using SAT
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'03)
The BDD Space Complexity of Different Forms of Concurrency
Fundamenta Informaticae - Application of Concurrency to System Design
Timed concurrent game structures
CONCUR'07 Proceedings of the 18th international conference on Concurrency Theory
Compositional verification of application-level security properties
ESSoS'13 Proceedings of the 5th international conference on Engineering Secure Software and Systems
Counterexample-guided abstraction refinement for linear programs with arrays
Automated Software Engineering
| Hi-index | 0.00 |