Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Modern digital design
The temporal logic of reactive and concurrent systems
The temporal logic of reactive and concurrent systems
Performance modeling of automated manufacturing systems
Performance modeling of automated manufacturing systems
Symbolic model checking: an approach to the state explosion problem
Symbolic model checking: an approach to the state explosion problem
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Petri Net Theory and the Modeling of Systems
Petri Net Theory and the Modeling of Systems
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
A Formal Verification Environment for Railway Signaling System Design
Formal Methods in System Design - Special issue: industrial critical systems
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This study presents new risk analysis tools and demonstrates the feasibility and applicability of these tools in the design verification of railway interlocking control systems and deadlock prevention in automated manufacturing systems. Our verification methodology consists of the following stages. First, we analyze the rules executed by the controller and extract a state machine model of the controller. Second, we compose safety, reliability, and operability system specifications using a propositional temporal logic. Finally, we use the model checker to check the state machine model of the system against its requirements. The verification approach allows an exhaustive search of all possible behaviors and scenarios. We verified two real railway interlocking control applications with 125 and 452 constraints respectively. Checking two opposing signal protection specifications involving 3 signals ranged between 74 and 1223 seconds depending on the size and the complexity of the interlocking. Traditional verification methods typically require several person weeks.