Symbolic model checking: an approach to the state explosion problem
Symbolic model checking: an approach to the state explosion problem
All from One, One for All: on Model Checking Using Representatives
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
The Design of a Multicore Extension of the SPIN Model Checker
IEEE Transactions on Software Engineering
Principles of Model Checking (Representation and Mind Series)
Principles of Model Checking (Representation and Mind Series)
DiVinE Multi-Core --- A Parallel LTL Model-Checker
ATVA '08 Proceedings of the 6th International Symposium on Automated Technology for Verification and Analysis
Partial-order reduction for general state exploring algorithms
International Journal on Software Tools for Technology Transfer (STTT)
Efficient Probabilistic Model Checking on General Purpose Graphics Processors
Proceedings of the 16th International SPIN Workshop on Model Checking Software
A Time-Optimal On-the-Fly Parallel Algorithm for Model Checking of Weak LTL Properties
ICFEM '09 Proceedings of the 11th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
CUDA Accelerated LTL Model Checking
ICPADS '09 Proceedings of the 2009 15th International Conference on Parallel and Distributed Systems
Distributed explicit fair cycle detection: set based approach
SPIN'03 Proceedings of the 10th international conference on Model checking software
Scalable multi-core LTL model-checking
Proceedings of the 14th international SPIN conference on Model checking software
Accelerating large graph algorithms on the GPU using CUDA
HiPC'07 Proceedings of the 14th international conference on High performance computing
Efficient explicit-state model checking on general purpose graphics processors
SPIN'10 Proceedings of the 17th international SPIN conference on Model checking software
Employing Multiple CUDA Devices to Accelerate LTL Model Checking
ICPADS '10 Proceedings of the 2010 IEEE 16th International Conference on Parallel and Distributed Systems
DiVinE: Parallel Distributed Model Checker
PDMC-HIBI '10 Proceedings of the 2010 Ninth International Workshop on Parallel and Distributed Methods in Verification, and Second International Workshop on High Performance Computational Systems Biology
Accelerating CUDA graph algorithms at maximum warp
Proceedings of the 16th ACM symposium on Principles and practice of parallel programming
Boosting multi-core reachability performance with shared hash tables
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
The SPIN Model Checker: Primer and Reference Manual
The SPIN Model Checker: Primer and Reference Manual
Multi-core nested depth-first search
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
Computing Strongly Connected Components in Parallel on CUDA
IPDPS '11 Proceedings of the 2011 IEEE International Parallel & Distributed Processing Symposium
DiVinE: a tool for distributed verification
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
LTSMIN: distributed and symbolic reachability
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
Editorial: Special issue editorial: Accelerators for high-performance computing
Journal of Parallel and Distributed Computing
On parallel software verification using boolean equation systems
SPIN'12 Proceedings of the 19th international conference on Model Checking Software
Improved multi-core nested depth-first search
ATVA'12 Proceedings of the 10th international conference on Automated Technology for Verification and Analysis
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Recent technological developments made various many-core hardware platforms widely accessible. These massively parallel architectures have been used to significantly accelerate many computation demanding tasks. In this paper, we show how the algorithms for LTL model checking can be redesigned in order to accelerate LTL model checking on many-core GPU platforms. Our detailed experimental evaluation demonstrates that using the NVIDIA CUDA technology results in a significant speedup of the verification process. Together with state space generation based on shared hash-table and DFS exploration, our CUDA accelerated model checker is the fastest among state-of-the-art shared memory model checking tools. The effective utilization of the CUDA technology, however, is quite often reduced by the costly preparation of suitable data structures and limited to small or middle-sized instances due to space limitations, which is also the case of our CUDA-aware LTL model checking solutions. Hence, we further suggest how to overcome these limitations by multi-core construction of the compact data structures and by employing multiple CUDA devices for acceleration of fine-grained communication-intensive parallel algorithms for LTL model checking.