Symbolic model checking: an approach to the state explosion problem
Symbolic model checking: an approach to the state explosion problem
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
Communicating sequential processes
Communications of the ACM
The Theory and Practice of Concurrency
The Theory and Practice of Concurrency
Verification of the Futurebus+ Cache Coherence Protocol
CHDL '93 Proceedings of the 11th IFIP WG10.2 International Conference sponsored by IFIP WG10.2 and in cooperation with IEEE COMPSOC on Computer Hardware Description Languages and their Applications
New directions in refinement checking
New directions in refinement checking
High-performance fractal coherence
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
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This paper presents a case study for automatic verification using the Communicating Sequential Processes formalism. The case study concerns the Futurebus+ cache coherency standard; we develop a formal model of the protocol and perform some verification tasks upon it. In the process of doing so, we extend the previous solution by developing a formal specification of cache coherence that is suitable for the verification of both directory and snooping based cache coherence protocols.