Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Analysis of discrete event coordination
REX workshop Proceedings on Stepwise refinement of distributed systems: models, formalisms, correctness
CAAP '90 Proceedings of the fifteenth colloquium on CAAP'90
Symbolic model checking: an approach to the state explosion problem
Symbolic model checking: an approach to the state explosion problem
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
BDD-Based Debugging Of Design Using Language Containment and Fair CTL
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Edge-Streett/ Edge-Rabin Automata Environment for
Edge-Streett/ Edge-Rabin Automata Environment for
CTL model checking based on forward state traversal
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Forward model checking techniques oriented to buggy designs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Efficient Detection of Vacuity in Temporal Model Checking
Formal Methods in System Design - Special issue on CAV '97
A hybrid verification approach: getting deep into the design
Proceedings of the 39th annual Design Automation Conference
Input Elimination and Abstraction in Model Checking
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
A Comparative Study of Symbolic Algorithms for the Computation of Fair Cycles
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Scalable Distributed On-the-Fly Symbolic Model Checking
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Using Edge-Valued Decision Diagrams for Symbolic Generation of Shortest Paths
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Efficient Diagnostic Generation for Boolean Equation Systems
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Coverage Metrics for Temporal Logic Model Checking
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Branching vs. Linear Time: Final Showdown
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Fate and Free Will in Error Traces
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Vacuity Detection in Temporal Model Checking
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Efficient Debugging in a Formal Verification Environment
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
A Practical Approach to Coverage in Model Checking
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Data flow testing as model checking
Proceedings of the 25th International Conference on Software Engineering
Formal Verification of Digital Systems
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
A tutorial introduction to symbolic model checking
Logic for concurrency and synchronisation
An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps
Formal Methods in System Design
Model Checking with Strong Fairness
Formal Methods in System Design
Algorithms for compacting error traces
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Functional test generation using property decompositions for validation of pipelined processors
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Formal analysis of hardware requirements
Proceedings of the 43rd annual Design Automation Conference
Coverage metrics for temporal logic model checking
Formal Methods in System Design
Proceedings of the 5th international conference on Generative programming and component engineering
Properties Incompleteness Evaluation by Functional Verification
IEEE Transactions on Computers
Relating counterexamples to test cases in CTL model checking specifications
Proceedings of the 3rd international workshop on Advances in model-based testing
A game-based framework for CTL counterexamples and 3-valued abstraction-refinement
ACM Transactions on Computational Logic (TOCL)
Too Few or Too Many Properties? Measure it by ATPG!
Journal of Electronic Testing: Theory and Applications
What causes a system to satisfy a specification?
ACM Transactions on Computational Logic (TOCL)
Specification-driven directed test generation for validation of pipelined processors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Reuse and optimization of testbenches and properties in a TLM-to-RTL design flow
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Data Flow Analysis and Testing of Abstract State Machines
ABZ '08 Proceedings of the 1st international conference on Abstract State Machines, B and Z
Effective blame for information-flow violations
Proceedings of the 16th ACM SIGSOFT International Symposium on Foundations of software engineering
Formal Methods in System Design
Counterexample Generation for Discrete-Time Markov Chains Using Bounded Model Checking
VMCAI '09 Proceedings of the 10th International Conference on Verification, Model Checking, and Abstract Interpretation
Beyond vacuity: towards the strongest passing formula
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Functional test generation using design and property decomposition techniques
ACM Transactions on Embedded Computing Systems (TECS)
Explaining Counterexamples Using Causality
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Issues in using model checkers for test case generation
Journal of Systems and Software
Making the Most of BMC Counterexamples
Electronic Notes in Theoretical Computer Science (ENTCS)
Enhancing Test Coverage by Back-tracing Model-checker Counterexamples
Electronic Notes in Theoretical Computer Science (ENTCS)
ICALP'03 Proceedings of the 30th international conference on Automata, languages and programming
Justification based on program transformation
LOPSTR'02 Proceedings of the 12th international conference on Logic based program synthesis and transformation
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
Coverage in interpolation-based model checking
Proceedings of the 47th Design Automation Conference
Developer-friendly verification of process-based systems
Knowledge-Based Systems
Exploring inconsistencies between modal transition systems
Software and Systems Modeling (SoSyM)
Journal of Computer and System Sciences
A framework for counterexample generation and exploration
FASE'05 Proceedings of the 8th international conference, held as part of the joint European Conference on Theory and Practice of Software conference on Fundamental Approaches to Software Engineering
Shortest counterexamples for symbolic model checking of LTL with past
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
TRANSYT: a tool for the verification of asynchronous concurrent systems
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
SMTT'03 Proceedings of the 2003 international conference on Scenarios: models, Transformations and Tools
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
Incremental formal verification of hardware
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Explaining counterexamples using causality
Formal Methods in System Design
Sanity checks in formal verification
CONCUR'06 Proceedings of the 17th international conference on Concurrency Theory
Finding shortest witnesses to the nonemptiness of automata on infinite words
CONCUR'06 Proceedings of the 17th international conference on Concurrency Theory
Short witnesses and accepting lassos in ω-automata
LATA'10 Proceedings of the 4th international conference on Language and Automata Theory and Applications
Survey: Linear Temporal Logic Symbolic Model Checking
Computer Science Review
Minimal proof search for modal logic k model checking
JELIA'12 Proceedings of the 13th European conference on Logics in Artificial Intelligence
Timed CTL model checking in real-time maude
WRLA'12 Proceedings of the 9th international conference on Rewriting Logic and Its Applications
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
Proof graphs for parameterised boolean equation systems
CONCUR'13 Proceedings of the 24th international conference on Concurrency Theory
Beyond vacuity: towards the strongest passing formula
Formal Methods in System Design
Effective verification of confidentiality for multi-threaded programs
Journal of Computer Security - Foundational Aspects of Security
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