Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Modalities for model checking: branching time logic strikes back
Science of Computer Programming
A unified approach to language containment and fair CTL model checking
DAC '93 Proceedings of the 30th international Design Automation Conference
Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
Testing language containment for &ohgr;-automata using BDDs
Information and Computation
Efficient generation of counterexamples and witnesses in symbolic model checking
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
An On-Line Edge-Deletion Problem
Journal of the ACM (JACM)
Model checking
Implicit enumeration of strongly connected components
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Symbolic Model Checking
Computing strongly connected components in a linear number of symbolic steps
SODA '03 Proceedings of the fourteenth annual ACM-SIAM symposium on Discrete algorithms
Faster Algorithms for the Nonemptiness of Streett Automata and for Communication Protocol Pruning
SWAT '96 Proceedings of the 5th Scandinavian Workshop on Algorithm Theory
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
A Comparative Study of Symbolic Algorithms for the Computation of Fair Cycles
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Efficient omega-Regular Language Containment
CAV '92 Proceedings of the Fourth International Workshop on Computer Aided Verification
Algorithmic Verification of Linear Temporal Logic Specifications
ICALP '98 Proceedings of the 25th International Colloquium on Automata, Languages and Programming
Implicit enumeration of strongly connected components and an application to formal verification
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Compositional SCC Analysis for Language Emptiness
Formal Methods in System Design
Finding strongly connected components in parallel using O(log2n) reachability queries
Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures
ICALP '08 Proceedings of the 35th international colloquium on Automata, Languages and Programming, Part II
Graded-CTL: Satisfiability and Symbolic Model Checking
ICFEM '09 Proceedings of the 11th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
Fault localization and correction with QBF
SAT'07 Proceedings of the 10th international conference on Theory and applications of satisfiability testing
An automatic method for the dynamic construction of abstractions of states of a formal model
Cybernetics and Systems Analysis
Journal of Computer and System Sciences
An incremental approach to model checking progress properties
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Synthesis of Reactive(1) designs
Journal of Computer and System Sciences
On symbolic OBDD-based algorithms for the minimum spanning tree problem
Theoretical Computer Science
| Hi-index | 0.00 |
We present a symbolic algorithm for strongly connected component decomposition. The algorithm performs 驴(n log n) image and preimage computations in the worst case, where n is the number of nodes in the graph. This is an improvement over the previously known quadratic bound. The algorithm can be used to decide emptiness of Büchi automata with the same complexity bound, improving Emerson and Lei's quadratic bound, and emptiness of Streett automata, with a similar bound in terms of nodes. It also leads to an improved procedure for the generation of nonemptiness witnesses.