Verification support for workflow design with UML activity graphs
Proceedings of the 24th International Conference on Software Engineering
Improving Automata Generation for Linear Temporal Logic by Considering the Automaton Hierarchy
LPAR '01 Proceedings of the Artificial Intelligence on Logic for Programming
A Comparative Study of Symbolic Algorithms for the Computation of Fair Cycles
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Sharp Disjunctive Decomposition for Language Emptiness Checking
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Analysis of Symbolic SCC Hull Algorithms
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Is There a Best Symbolic Cycle-Detection Algorithm?
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
A Simulation Preorder for Abstraction of Reactive Systems
VMCAI '02 Revised Papers from the Third International Workshop on Verification, Model Checking, and Abstract Interpretation
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume I - Volume I
Model Checking LTL Properties of High-Level Petri Nets with Fairness Constraints
ICATPN '01 Proceedings of the 22nd International Conference on Application and Theory of Petri Nets
Verifying Liveness by Augmented Abstraction
CSL '99 Proceedings of the 13th International Workshop and 8th Annual Conference of the EACSL on Computer Science Logic
A Deductive Proof System for CTL
CONCUR '02 Proceedings of the 13th International Conference on Concurrency Theory
Tool Support for Verifying UML Activity Diagrams
IEEE Transactions on Software Engineering
PLTL-partitioned model checking for reactive systems under fairness assumptions
ACM Transactions on Embedded Computing Systems (TECS)
Bridging the gap between fair simulation and trace inclusion
Information and Computation
An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps
Formal Methods in System Design
Model Checking with Strong Fairness
Formal Methods in System Design
Compositional SCC Analysis for Language Emptiness
Formal Methods in System Design
From complementation to certification
Theoretical Computer Science - Tools and algorithms for the construction and analysis of systems (TACAS 2004)
Symbolic model checking of UML activity diagrams
ACM Transactions on Software Engineering and Methodology (TOSEM)
Nested emptiness search for generalized Büchi automata
Fundamenta Informaticae - Special issue on application of concurrency to system design (ACSD'04)
Proving that programs eventually do something good
Proceedings of the 34th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
A compositional approach to CTL* verification
Theoretical Computer Science - Formal methods for components and objects
Bounded model checking of infinite state systems
Formal Methods in System Design
Embedding finite automata within regular expressions
Theoretical Computer Science
On the Merits of Temporal Testers
25 Years of Model Checking
Partitioned PLTL model-checking for refined transition systems
Information and Computation
Bridging the gap between fair simulation and trace inclusion
Information and Computation
Parameterized verification by probabilistic abstraction
FOSSACS'03/ETAPS'03 Proceedings of the 6th International conference on Foundations of Software Science and Computation Structures and joint European conference on Theory and practice of software
Distributed explicit fair cycle detection: set based approach
SPIN'03 Proceedings of the 10th international conference on Model checking software
From LTL to symbolically represented deterministic automata
VMCAI'08 Proceedings of the 9th international conference on Verification, model checking, and abstract interpretation
Uniform satisfiability problem for local temporal logics over Mazurkiewicz traces
Information and Computation
Analyzing the behavior of event processing applications
Proceedings of the Fourth ACM International Conference on Distributed Event-Based Systems
Symbolic computation of strongly connected components and fair cycles using saturation
Innovations in Systems and Software Engineering
Self-loop aggregation product: a new hybrid approach to on-the-fly LTL model checking
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
Separating fairness and well-foundedness for the analysis of fair discrete systems
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Shortest counterexamples for symbolic model checking of LTL with past
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Ranking abstraction of recursive programs
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
Incremental and complete bounded model checking for full PLTL
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Synthesis of Reactive(1) designs
Journal of Computer and System Sciences
PSL model checking and run-time verification via testers
FM'06 Proceedings of the 14th international conference on Formal Methods
HVC'05 Proceedings of the First Haifa international conference on Hardware and Software Verification and Testing
Survey: Linear Temporal Logic Symbolic Model Checking
Computer Science Review
Nested Emptiness Search for Generalized Büchi Automata
Fundamenta Informaticae - APPLICATION OF CONCURRENCY TO SYSTEM DESIGN (ACSD'04)
Fundamenta Informaticae
Propositional dynamic logic with converse and repeat for message-passing systems
CONCUR'12 Proceedings of the 23rd international conference on Concurrency Theory
Symbolic model-checking of stateful timed CSP using BDD and digitization
ICFEM'12 Proceedings of the 14th international conference on Formal Engineering Methods: formal methods and software engineering
Strength-Based decomposition of the property Büchi automaton for faster model checking
TACAS'13 Proceedings of the 19th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Hi-index | 0.00 |