Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Modalities for model checking (extended abstract): branching time strikes back
POPL '85 Proceedings of the 12th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Checking that finite state concurrent programs satisfy their linear specification
POPL '85 Proceedings of the 12th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Symbolic Model Checking
Mona: Monadic Second-Order Logic in Practice
TACAS '95 Proceedings of the First International Workshop on Tools and Algorithms for Construction and Analysis of Systems
Duration Specifications for Shared Processors
Proceedings of the Second International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems
XEVE, an ESTEREL Verification Environment
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Quantitative Temporal Reasoning
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
VIS: A System for Verification and Synthesis
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Some Extensions to Propositional Mean-Value Caculus: Expressiveness and Decidability
CSL '95 Selected Papers from the9th International Workshop on Computer Science Logic
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
Proceedings of the Conference on Logic of Programs
Algorithmic Verification of Linear Temporal Logic Specifications
ICALP '98 Proceedings of the 25th International Colloquium on Automata, Languages and Programming
CIAA '00 Revised Papers from the 5th International Conference on Implementation and Application of Automata
LICS '95 Proceedings of the 10th Annual IEEE Symposium on Logic in Computer Science
The temporal logic of programs
SFCS '77 Proceedings of the 18th Annual Symposium on Foundations of Computer Science
Finding Extremal Models of Discrete Duration Calculus formulae using Symbolic Search
Electronic Notes in Theoretical Computer Science (ENTCS)
On sampling abstraction of continuous time logic with durations
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
Modal strength reduction in quantified discrete duration calculus
FSTTCS '05 Proceedings of the 25th international conference on Foundations of Software Technology and Theoretical Computer Science
Bounded validity checking of interval duration logic
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
LEADSTO: a language and environment for analysis of dynamics by simulation
MATES'05 Proceedings of the Third German conference on Multiagent System Technologies
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We define a logic called CTL*[DC] which extends CTL* with ability to specify past-time and quantitative timing properties using the formulae of Quantified Discrete-time Duration Calculus (QDDC). Alternately, we can consider CTL*[DC] as extending logic QDDC with branching and liveness.As our main result, we show a reduction of CTL*[DC] model checking problem to model checking of CTL* formulae. The reduction relies upon an automata-theoretic decision procedure for QDDC. Moreover, it preserves the subsets CTL and LTL of CTL*. The reduction is of practical relevance as model checking of CTL* as well as its subsets CTL and LTL are well studied and even implemented into a number of tools. We briefly discuss an implementation of a model checking tool for CTL[DC] called CTLDC, based on the above theory. CTLDC can model check SMV, Verilog and Esterel designs using tools SMV, VIS and Xeve, respectively.