Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
A hierarchy of temporal properties (invited paper, 1989)
PODC '90 Proceedings of the ninth annual ACM symposium on Principles of distributed computing
Tableau-based model checking in the propositional mu-calculus
Acta Informatica
Concurrent programming: principles and practice
Concurrent programming: principles and practice
Handbook of theoretical computer science (vol. B)
Verifying temporal properties of systems
Verifying temporal properties of systems
Local model checking in the modal mu-calculus
TAPSOFT '89 2nd international joint conference on Theory and practice of software development
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Formal methods: state of the art and future directions
ACM Computing Surveys (CSUR) - Special ACM 50th-anniversary issue: strategic directions in computing research
Analysis of cyclic combinational circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
GRASP: A Search Algorithm for Propositional Satisfiability
IEEE Transactions on Computers
Symbolic model checking using SAT procedures instead of BDDs
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Checking that finite state concurrent programs satisfy their linear specification
POPL '85 Proceedings of the 12th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
ACM Transactions on Programming Languages and Systems (TOPLAS)
Model checking
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
Bounded Model Checking Using Satisfiability Solving
Formal Methods in System Design
Can BDDs compete with SAT solvers on bounded model checking?
Proceedings of the 39th annual Design Automation Conference
Algorithms and Data Structures in VLSI Design
Algorithms and Data Structures in VLSI Design
Constructing automata from temporal logic formulas: a tutorial
Lectures on formal methods and performance analysis
Introduction to Algorithms
Representing Arithmetic Constraints with Finite Automata: An Overview
ICLP '02 Proceedings of the 18th International Conference on Logic Programming
Nontraditional Applications of Automata Theory
TACS '94 Proceedings of the International Conference on Theoretical Aspects of Computer Software
Simple on-the-fly automatic verification of linear temporal logic
Proceedings of the Fifteenth IFIP WG6.1 International Symposium on Protocol Specification, Testing and Verification XV
Techniques for Implicit State Enumeration of EFSMs
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Checking Safety Properties Using Induction and a SAT-Solver
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Deciding Presburger Arithmetic by Model Checking and Comparisons with Other Methods
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Deterministic w Automata vis-a-vis Deterministic Buchi Automata
ISAAC '94 Proceedings of the 5th International Symposium on Algorithms and Computation
Alternative Proof Procedures for Finite-State Machines in Higher-Order Logic
HUG '93 Proceedings of the 6th International Workshop on Higher Order Logic Theorem Proving and its Applications
Proving the Equivalence of Microstep and Macrostep Semantics
TPHOLs '02 Proceedings of the 15th International Conference on Theorem Proving in Higher Order Logics
Local Model Checking in the Modal Mu-Calculus
TAPSOFT '89/CAAP '89 Proceedings of the International Joint Conference on Theory and Practice of Software Development, Volume 1: Advanced Seminar on Foundations of Innovative Software Development I and Colloquium on Trees in Algebra and Programming
A Verified Hardware Synthesis of Esterel Programs
DIPES '00 Proceedings of the IFIP WG10.3/WG10.4/WG10.5 International Workshop on Distributed and Parallel Embedded Systems: Architecture and Design of Distributed Embedded Systems
Static Program Analysis via 3-Valued Logic
SAS '02 Proceedings of the 9th International Symposium on Static Analysis
A Comparison of Presburger Engines for EFSM Reachability
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Another Look at LTL Model Checking
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Symbolic Model Checking of Infinite State Systems Using Presburger Arithmetic
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
A Short Introduction to Infinite Automata
DLT '01 Revised Papers from the 5th International Conference on Developments in Language Theory
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
Diophantine Equations, Presburger Arithmetic and Finite Automata
CAAP '96 Proceedings of the 21st International Colloquium on Trees in Algebra and Programming
The anchored version of the temporal framework
Linear Time, Branching Time and Partial Order in Logics and Models for Concurrency, School/Workshop
Lazy Theorem Proving for Bounded Model Checking over Infinite Domains
CADE-18 Proceedings of the 18th International Conference on Automated Deduction
Algorithmic Verification of Linear Temporal Logic Specifications
ICALP '98 Proceedings of the 25th International Colloquium on Automata, Languages and Programming
Cache Behavior Prediction by Abstract Interpretation
SAS '96 Proceedings of the Third International Symposium on Static Analysis
Embedding Imperative Synchronous Languages in Interactive Theorem Provers
ACSD '01 Proceedings of the Second International Conference on Application of Concurrency to System Design
BerkMin: A Fast and Robust Sat-Solver
Proceedings of the conference on Design, automation and test in Europe
Formal analysis of synchronous circuits
Formal analysis of synchronous circuits
Verification of Reactive Systems: Formal Methods and Algorithms
Verification of Reactive Systems: Formal Methods and Algorithms
Global vs. Local Model Checking: A Comparison of Verification Techniques for Infinite State Systems
SEFM '04 Proceedings of the Software Engineering and Formal Methods, Second International Conference
ACSD '05 Proceedings of the Fifth International Conference on Application of Concurrency to System Design
Bounded model checking of infinite state systems
Formal Methods in System Design
An automata-theoretic approach to software verification
DLT'03 Proceedings of the 7th international conference on Developments in language theory
Experimental analysis of different techniques for bounded model checking
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
Verifying the adaptation behavior of embedded systems
Proceedings of the 2006 international workshop on Self-adaptation and self-managing systems
Bounded model checking of infinite state systems
Formal Methods in System Design
Action Language verifier: an infinite-state model checker for reactive software specifications
Formal Methods in System Design
From PSL to LTL: a formal validation in HOL
TPHOLs'05 Proceedings of the 18th international conference on Theorem Proving in Higher Order Logics
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Bounded model checking (BMC) is an attractive alternative to symbolic model checking, since it often allows a more efficient verification. The idea of BMC is to reduce the model checking problem to a satisfiability problem of the underlying base logic, so that sophisticated decision procedures can be utilized to check the resulting formula. We present a new approach to BMC that extends current methods in three ways: First, instead of a reduction to propositional logic which restricts BMC to finite state systems, we focus on infinite state systems and therefore consider more powerful, yet decidable base logics. Second, instead of directly unwinding temporal logic formulas, we use special translations to 驴-automata that take into account the temporal logic hierarchy and maintain safety and liveness properties. Third, we employ both global and local model checking procedures to take advantage of the different types of specifications that can be handled by these techniques. Based on three-valued logic, our bounded model checking procedures may either prove or disprove a specification, or they may explicitly state that no information has been obtained due to insufficient bounds.