A new method for compiling schizophrenic synchronous programs
CASES '01 Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems
Proving the Equivalence of Microstep and Macrostep Semantics
TPHOLs '02 Proceedings of the 15th International Conference on Theorem Proving in Higher Order Logics
RTSS '03 Proceedings of the 24th IEEE International Real-Time Systems Symposium
System Level Design and Verification Using a Synchronous Language
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Exact High Level WCET Analysis of Synchronous Programs by Symbolic State Space Exploration
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Synthesizing safe state machines from Esterel
Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems
Verifying the adaptation behavior of embedded systems
Proceedings of the 2006 international workshop on Self-adaptation and self-managing systems
Bounded model checking of infinite state systems
Formal Methods in System Design
Separate compilation for synchronous programs
Proceedings of th 12th International Workshop on Software and Compilers for Embedded Systems
A Verified Compiler for Synchronous Programs with Local Declarations
Electronic Notes in Theoretical Computer Science (ENTCS)
Static data-flow analysis of synchronous programs
MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
Translating concurrent action oriented specifications to synchronous guarded actions
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems
Formal verification of hardware synthesis
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
Passive code in synchronous programs
ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers
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We present a new way to define the semantics of imperative synchronous languages by means of separating the control and the dataflow. The control flow is defined by predicates that describe entering conditions, conditions for internal moves, and termination conditions. The dataflow is based on the extraction of guarded commands. This definition principle can be applied to any imperative synchronous language like Esterel or some statechart variants. Following this definition principle, we have embedded our language Quartz (an Esterel variant) in the interactive theorem prover HOL We use this embedding for formal verification (both interactive theorem proving and symbolic model checking), program analysis, reasoning about the language at a meta-level, and verified code generation (formal synthesis).