PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
Lava: hardware design in Haskell
ICFP '98 Proceedings of the third ACM SIGPLAN international conference on Functional programming
Proof, language, and interaction
Introduction to algorithms
The Verification of a Bit-slice ALU
Workshop on Hardware Specification, Verification and Synthesis: Mathematical Aspects
Veritas+: A Specification Language Based on Type Theory
Workshop on Hardware Specification, Verification and Synthesis: Mathematical Aspects
The Design and Verification of a Sorter Core
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Embedding Imperative Synchronous Languages in Interactive Theorem Provers
ACSD '01 Proceedings of the Second International Conference on Application of Concurrency to System Design
Certifying circuits in Type Theory
Formal Aspects of Computing
Putting it all together – Formal verification of the VAMP
International Journal on Software Tools for Technology Transfer (STTT) - A View from Formal Methods 2003 (pp 301-354); Special Section on Recent Advances in Hardware Verification (pp 355-447)
Proof producing synthesis of arithmetic and cryptographic hardware
Formal Aspects of Computing
Scheduling as Rule Composition
MEMOCODE '07 Proceedings of the 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign
Parametric higher-order abstract syntax for mechanized semantics
Proceedings of the 13th ACM SIGPLAN international conference on Functional programming
A Formally Verified Compiler Back-end
Journal of Automated Reasoning
A verified compiler for an impure functional language
Proceedings of the 37th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
A monadic approach to automated reasoning for Bluespec SystemVerilog
Innovations in Systems and Software Engineering
Formalising bitonic sort in type theory
TYPES'04 Proceedings of the 2004 international conference on Types for Proofs and Programs
Strongly Typed Term Representations in Coq
Journal of Automated Reasoning
| Hi-index | 0.00 |
We report on the implementation of a certified compiler for a high-level hardware description language (HDL) called Fe-Si (FEatherweight SynthesIs). Fe-Si is a simplified version of Bluespec, an HDL based on a notion of guarded atomic actions. Fe-Si is defined as a dependently typed deep embedding in Coq. The target language of the compiler corresponds to a synthesisable subset of Verilog or VHDL. A key aspect of our approach is that input programs to the compiler can be defined and proved correct inside Coq. Then, we use extraction and a Verilog back-end (written in OCaml) to get a certified version of a hardware design.