Proof producing synthesis of arithmetic and cryptographic hardware

Authors:
Konrad Slind;Scott Owens;Juliano Iyoda;Mike Gordon
Affiliations:
University of Utah, School of Computing, 50 South Central Campus Drive, UT84112, Salt Lake City, Utah, USA;University of Utah, School of Computing, 50 South Central Campus Drive, UT84112, Salt Lake City, Utah, USA;University of Cambridge Computer Laboratory, William Gates Building, 15 JJ Thomson Avenue, CB3 0FD, Cambridge, Utah, UK;University of Cambridge Computer Laboratory, William Gates Building, 15 JJ Thomson Avenue, CB3 0FD, Cambridge, Utah, UK
Venue:
Formal Aspects of Computing
Year:
2007

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Abstract

A compiler from a synthesisable subset of higher order logic to clocked synchronous hardware is described. It is being used to create coprocessors for cryptographic and arithmetic applications. The compiler automatically translates a function f defined in higher order logic (typically using recursion) into a device that computes f via a four-phase handshake circuit. Compilation is by fully automatic proof in the HOL4 system, and generates a correctness theorem for each compiled function. Synthesised circuits can be directly translated to Verilog, and then input to design automation tools. A fully-expansive ‘LCF methodology’ allows users to safely modify and extend the compiler’s theorem proving scripts to add optimisations or to enlarge the synthesisable subset of higher order logic.