Formalization of a parameterized parallel adder within the coq theorem prover
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Formally certified stable marriages
Proceedings of the 48th Annual Southeast Regional Conference
Coquet: a coq library for verifying hardware
CPP'11 Proceedings of the First international conference on Certified Programs and Proofs
Formal verification of hardware synthesis
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
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We investigate how to take advantage of the particular features of the calculus of inductive constructions in the framework of hardware verification. First, we emphasize in a short case study the use of dependent types and of the constructive aspect of the logic for specifying and synthesizing combinatorial circuits. Then, co-inductive types are introduced to model the temporal aspects of sequential synchronous devices. Moore and Mealy automata are co-inductively axiomatized and are used to represent uniformly both the structures and the behaviors of the circuits. This leads to clear, general and elegant proof processes as is illustrated on the example of a realistic circuit: the ATM Switch Fabric. All the proofs are carried out using Coq.