Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
Testing language containment for &ohgr;-automata using BDDs
Information and Computation
Efficient generation of counterexamples and witnesses in symbolic model checking
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Implicit enumeration of strongly connected components
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Symbolic Model Checking
Efficient omega-Regular Language Containment
CAV '92 Proceedings of the Fourth International Workshop on Computer Aided Verification
VIS: A System for Verification and Synthesis
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Algorithmic Verification of Linear Temporal Logic Specifications
ICALP '98 Proceedings of the 25th International Colloquium on Automata, Languages and Programming
Computing strongly connected components in a linear number of symbolic steps
SODA '03 Proceedings of the fourteenth annual ACM-SIAM symposium on Discrete algorithms
Improving Automata Generation for Linear Temporal Logic by Considering the Automaton Hierarchy
LPAR '01 Proceedings of the Artificial Intelligence on Logic for Programming
Sharp Disjunctive Decomposition for Language Emptiness Checking
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Analysis of Symbolic SCC Hull Algorithms
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Is There a Best Symbolic Cycle-Detection Algorithm?
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Branching vs. Linear Time: Final Showdown
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Fate and Free Will in Error Traces
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Divide and Compose: SCC Refinement for Language Emptiness
CONCUR '01 Proceedings of the 12th International Conference on Concurrency Theory
An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps
Formal Methods in System Design
Model Checking with Strong Fairness
Formal Methods in System Design
Compositional SCC Analysis for Language Emptiness
Formal Methods in System Design
From complementation to certification
Theoretical Computer Science - Tools and algorithms for the construction and analysis of systems (TACAS 2004)
GSTE is partitioned model checking
Formal Methods in System Design
Model-Checking Large Finite-State Systems and Beyond
SOFSEM '07 Proceedings of the 33rd conference on Current Trends in Theory and Practice of Computer Science
Semi-external LTL Model Checking
CAV '08 Proceedings of the 20th international conference on Computer Aided Verification
On the Relative Succinctness of Nondeterministic Büchi and co-Büchi Word Automata
LPAR '08 Proceedings of the 15th International Conference on Logic for Programming, Artificial Intelligence, and Reasoning
Counterexamples in Probabilistic LTL Model Checking for Markov Chains
CONCUR 2009 Proceedings of the 20th International Conference on Concurrency Theory
Distributed verification: exploring the power of raw computing power
FMICS'06/PDMC'06 Proceedings of the 11th international workshop, FMICS 2006 and 5th international workshop, PDMC conference on Formal methods: Applications and technology
Distributed explicit fair cycle detection: set based approach
SPIN'03 Proceedings of the 10th international conference on Model checking software
I/O efficient accepting cycle detection
CAV'07 Proceedings of the 19th international conference on Computer aided verification
A hybrid algorithm for LTL games
VMCAI'08 Proceedings of the 9th international conference on Verification, model checking, and abstract interpretation
Revisiting resistance speeds up I/O-efficient LTL model checking
TACAS'08/ETAPS'08 Proceedings of the Theory and practice of software, 14th international conference on Tools and algorithms for the construction and analysis of systems
Scalable liveness checking via property-preserving transformations
Proceedings of the Conference on Design, Automation and Test in Europe
Efficient explicit-state model checking on general purpose graphics processors
SPIN'10 Proceedings of the 17th international SPIN conference on Model checking software
The quest for a tight translation of büchi to co-büchi automata
Fields of logic and computation
Symbolic computation of strongly connected components and fair cycles using saturation
Innovations in Systems and Software Engineering
Cluster-Based LTL model checking of large systems
FMCO'05 Proceedings of the 4th international conference on Formal Methods for Components and Objects
Journal of Computer and System Sciences
Lower bounds on the OBDD size of graphs of some popular functions
SOFSEM'05 Proceedings of the 31st international conference on Theory and Practice of Computer Science
Shortest counterexamples for symbolic model checking of LTL with past
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Symbolic systems, explicit properties: on hybrid approaches for LTL symbolic model checking
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
On symbolic scheduling independent tasks with restricted execution times
WEA'05 Proceedings of the 4th international conference on Experimental and Efficient Algorithms
A symbolic approach to the all-pairs shortest-paths problem
WG'04 Proceedings of the 30th international conference on Graph-Theoretic Concepts in Computer Science
Exponential lower bounds on the space complexity of OBDD-Based graph algorithms
LATIN'06 Proceedings of the 7th Latin American conference on Theoretical Informatics
A Büchi automata based model checking framework for reo connectors
Proceedings of the 27th Annual ACM Symposium on Applied Computing
Survey: Linear Temporal Logic Symbolic Model Checking
Computer Science Review
On symbolic OBDD-based algorithms for the minimum spanning tree problem
Theoretical Computer Science
Translating to Co-Büchi Made Tight, Unified, and Useful
ACM Transactions on Computational Logic (TOCL)
Tightening the exchange rates between automata
CSL'07/EACSL'07 Proceedings of the 21st international conference, and Proceedings of the 16th annuall conference on Computer Science Logic
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Detection of fair cycles is an important task of many model checking algorithms. When the transition system is represented symbolically, the standard approach to fair cycle detection is the one of Emerson and Lei. In the last decade variants of this algorithm and an alternative method based on strongly connected component decomposition have been proposed. We present a taxonomy of these techniques and compare representatives of each major class on a collection of real-life examples. Our results indicate that the Emerson-Lei procedure is the fastest, but other algorithms tend to generate shorter counter-examples.