Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
Heuristic minimization of BDDs using don't cares
DAC '94 Proceedings of the 31st annual Design Automation Conference
Approximate reachability don't cares for CTL model checking
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Checking that finite state concurrent programs satisfy their linear specification
POPL '85 Proceedings of the 12th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Symbolic Model Checking
A Comparative Study of Symbolic Algorithms for the Computation of Fair Cycles
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Counterexample-Guided Abstraction Refinement
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Efficient omega-Regular Language Containment
CAV '92 Proceedings of the Fourth International Workshop on Computer Aided Verification
VIS: A System for Verification and Synthesis
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Freedom, Weakness, and Determinism: From Linear-Time to Branching-Time
LICS '98 Proceedings of the 13th Annual IEEE Symposium on Logic in Computer Science
Iterative abstraction-based ctl model checking
Iterative abstraction-based ctl model checking
Implicit enumeration of strongly connected components and an application to formal verification
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Sharp Disjunctive Decomposition for Language Emptiness Checking
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Analysis of Symbolic SCC Hull Algorithms
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
An incremental approach to model checking progress properties
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Nested Emptiness Search for Generalized Büchi Automata
Fundamenta Informaticae - APPLICATION OF CONCURRENCY TO SYSTEM DESIGN (ACSD'04)
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We propose a refinement approach to symbolic SCC analysis, which performs large parts of the computation on abstracted systems, and on small subsets of the state space. For language-emptiness checking, it quickly discards uninteresting parts of the state space; for the remaining states, it adapts the model checking computation to the strength of the SCCs at hand. We present a general framework for SCC refinement, which uses a compositional approach to generate and refine overapproximations. We show that our algorithm significantly outperforms the one of Emerson and Lei.