Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Verification of synchronous sequential machines based on symbolic execution
Proceedings of the international workshop on Automatic verification methods for finite state systems
Efficient implementation of a BDD package
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Logic synthesis for programmable gate arrays
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Sequential Circuit Design Using Synthesis and Optimization
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Advanced verification techniques based on learning
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Logic synthesis for engineering change
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Safe BDD minimization using don't cares
DAC '97 Proceedings of the 34th annual Design Automation Conference
Logic synthesis for large pass transistor circuits
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Don't care-based BDD minimization for embedded software
DAC '98 Proceedings of the 35th annual Design Automation Conference
Exact Minimization of Binary Decision Diagrams Using Implicit Techniques
IEEE Transactions on Computers
Symbolic reachability analysis of large finite state machines using don't cares
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Novel verification framework combining structural and OBDD methods in a synthesis environment
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
On the generation of multiplexer circuits for pass transistor logic
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Partial-Order Reduction in Symbolic State-Space Exploration
Formal Methods in System Design - Special issue on CAV '97
Formula-Dependent Equivalence for Compositional CTL Model Checking
Formal Methods in System Design
Divide and Compose: SCC Refinement for Language Emptiness
CONCUR '01 Proceedings of the 12th International Conference on Concurrency Theory
Performance Analysis of Asynchronous Circuits Using Markov Chains
Concurrency and Hardware Design, Advances in Petri Nets
Optimizing Symbolic Model Checking for Constraint-Rich Models
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Sequential optimization in the absence of global reset
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Simplifying Boolean constraint solving for random simulation-vector generation
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
VERIFUL: VERIfication using FUnctional Learning
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Exploiting Functional Dependencies in Finite State Machine Verification
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Minimizing ROBDD Sizes of Incompletely Specified Boolean Functions by Exploiting Strong Symmetries
EDTC '97 Proceedings of the 1997 European conference on Design and Test
On More Efficient Combinational ATPG Using Functional Learning
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Reed-Muller Forms for Incompletely Specified Functions via Sparse Polynomial Interpolation
ISMVL '95 Proceedings of the 25th International Symposium on Multiple-Valued Logic
The Compositional Far Side of Image Computation
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Proceedings of the 42nd annual Design Automation Conference
On the influence of the variable ordering for algorithmic learning using OBDDs
Information and Computation
Synthesis of irregular combinational functions with large don't care sets
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Decomposing image computation for symbolic reachability analysis using control flow information
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
On the influence of the variable ordering for algorithmic learning using OBDDs
Information and Computation
Using counterexamples for improving the precision of reachability computation with polyhedra
CAV'07 Proceedings of the 19th international conference on Computer aided verification
| Hi-index | 0.00 |