Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Efficient implementation of a BDD package
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Heuristic minimization of BDDs using don't cares
DAC '94 Proceedings of the 31st annual Design Automation Conference
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Logic synthesis for large pass transistor circuits
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Boolean Satisfiability and Equivalence Checking Using General Binary Decision Diagrams
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Minimizing ROBDD Sizes of Incompletely Specified Boolean Functions by Exploiting Strong Symmetries
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Area-Oriented Synthesis for Pass-Transistor Logic
ICCD '98 Proceedings of the International Conference on Computer Design
Low power optimization technique for BDD mapped circuits
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Recursive bipartitioning of BDDs for performance driven synthesis of pass transistor logic circuits
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Minimization of Ordered Pseudo Kronecker Decision Diagrams
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Evolutionary Synthesis of LogicCircuits Using Information Theory
Artificial Intelligence Review
Minimization of the expected path length in BDDs based on local changes
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Multithreshold voltage low-swing/low-voltage techniques in logic gates
Integration, the VLSI Journal
Average Path Length of Binary Decision Diagrams
IEEE Transactions on Computers
Exact lower bound for the number of switches in series to implement a combinational logic cell
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Evolutionary synthesis of logic circuits using information theory
Artificial intelligence in logic design
Fast disjoint transistor networks from BDDs
SBCCI '06 Proceedings of the 19th annual symposium on Integrated circuits and systems design
A comparative study of CMOS gates with minimum transistor stacks
Proceedings of the 20th annual conference on Integrated circuits and systems design
IEEE Transactions on Circuits and Systems II: Express Briefs
BDD decomposition for delay oriented pass transistor logic synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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