Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Algorithms for approximate FSM traversal
DAC '93 Proceedings of the 30th international Design Automation Conference
Heuristic minimization of BDDs using don't cares
DAC '94 Proceedings of the 31st annual Design Automation Conference
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Approximate reachability with BDDs using overlapping projections
DAC '98 Proceedings of the 35th annual Design Automation Conference
Don't care-based BDD minimization for embedded software
DAC '98 Proceedings of the 35th annual Design Automation Conference
Approximate reachability don't cares for CTL model checking
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
To split or to conjoin: the question in image computation
Proceedings of the 37th Annual Design Automation Conference
Non-linear quantification scheduling in image computation
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Early Quantification and Partitioned Transition Relations
ICCD '96 Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors
Border-Block Triangular Form and Conjunction Schedule in Image Computation
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Verification of Synchronous Sequential Machines Based on Symbolic Execution
Proceedings of the International Workshop on Automatic Verification Methods for Finite State Systems
Efficient Model Checking by Automated Ordering of Transition Relation Partitions
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
VIS: A System for Verification and Synthesis
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Fine-Grain Conjunction Scheduling for Symbolic Reachability Analysis
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Efficient Solution of Language Equations Using Partitioned Representations
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Disjunctive image computation for embedded software verification
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Disjunctive image computation for software verification
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Model-based variable and transition orderings for efficient symbolic model checking
FM'06 Proceedings of the 14th international conference on Formal Methods
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Symbolic image computation is the most fundamental computationin BDD-based sequential system optimization and formal verification.In this paper, we explore the use of over-approximationand BDD minimization with donýt cares during image computation.Our new method, based on the partitioned representation ofthe transition relation, consists of three phases: First, the model istreated as a set of loosely coupled components, and over-approximateimages are computed to minimize the transition relation ofeach component. A refined overall image is then computed usingthe simplified transition relation. Finally, the exact image isobtained by a clipping operation that recovers all previous over-approximations.Since BDD minimization employs constraints on thenext-state variables of the transition relation, instead of the customaryconstraints on the present-state variables, we call the resultingmethod far side image computation.The new method can be implemented on top of any image computationalgorithm that is based on the partitioned transition relation.(For example, IWLS95, MLP, and Fine-Grain.)We demonstrate the effectiveness of our approach by experimentson models ranging from easy to hard: The new method wins significantlyover the best known algorithms so far in both CPU timeand memory usage, especially on the hard models.