New techniques for efficient verification with implicitly conjoined BDDs
DAC '94 Proceedings of the 31st annual Design Automation Conference
Auxiliary variables for extending symbolic traversal techniques to data paths
DAC '94 Proceedings of the 31st annual Design Automation Conference
Exact Minimization of Binary Decision Diagrams Using Implicit Techniques
IEEE Transactions on Computers
Symbolic reachability analysis of large finite state machines using don't cares
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Ordered Binary Decision Diagrams and Minimal Trellises
IEEE Transactions on Computers
Using computational learning strategies as a tool for combinatorial optimization
Annals of Mathematics and Artificial Intelligence
Refining Model Checking by Abstract Interpretation
Automated Software Engineering
Efficient Algorithms for the Inference of Minimum Size DFAs
Machine Learning
Algebric Decision Diagrams and Their Applications
Formal Methods in System Design
A New Approach for the Verification of Cache Coherence Protocols
IEEE Transactions on Parallel and Distributed Systems
Techniques for Implicit State Enumeration of EFSMs
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
SAT-Based Image Computation with Application in Reachability Analysis
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Speeding Up Image Computation by Using RTL Information
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Techniques for Smaller Intermediary BDDs
CONCUR '01 Proceedings of the 12th International Conference on Concurrency Theory
Formal Verification of Designs with Complex Control by Symbolic Simulation
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Transformation-Based Verification Using Generalized Retiming
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Meta-BDDs: A Decomposed Representation for Layered Symbolic Manipulation of Boolean Functions
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Fine-Grain Conjunction Scheduling for Symbolic Reachability Analysis
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Constructive Analysis of Cyclic Circuits
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Exploiting Functional Dependencies in Finite State Machine Verification
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Minimizing ROBDD Sizes of Incompletely Specified Boolean Functions by Exploiting Strong Symmetries
EDTC '97 Proceedings of the 1997 European conference on Design and Test
AMLETO: A Multi-language Environment for Functional Test Generation
ITC '01 Proceedings of the 2001 IEEE International Test Conference
Algorithms and heuristics in VLSI design
Experimental algorithmics
The semantics and execution of a synchronous block-diagram language
Science of Computer Programming
The Compositional Far Side of Image Computation
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Set Manipulation with Boolean Functional Vectors for Symbolic Reachability Analysis
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Proceedings of the 42nd annual Design Automation Conference
Principles of Sequential-Equivalence Verification
IEEE Design & Test
Simulation-based bug trace minimization with BMC-based refinement
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Disjunctive image computation for software verification
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Computation of minimal counterexamples by using black box techniques and symbolic methods
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
A Symbolic Model Checking Framework for Safety Analysis, Diagnosis, and Synthesis
Model Checking and Artificial Intelligence
25 Years of Model Checking
Symbolic OBDD-Based Reachability Analysis Needs Exponential Space
SOFSEM '10 Proceedings of the 36th Conference on Current Trends in Theory and Practice of Computer Science
Type inference for datalog with complex type hierarchies
Proceedings of the 37th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Syntax-driven Behavior Partitioning for Model-checking of Esterel Programs
Electronic Notes in Theoretical Computer Science (ENTCS)
EUROCAST'07 Proceedings of the 11th international conference on Computer aided systems theory
Exponential space complexity for OBDD-based reachability analysis
Information Processing Letters
Full symbolic ATPG for large circuits
ITC'94 Proceedings of the 1994 international conference on Test
Logico-numerical abstract acceleration and application to the verification of data-flow programs
SAS'11 Proceedings of the 18th international conference on Static analysis
Benchmarking a model checker for algorithmic improvements and tuning for performance
Formal Methods in System Design
A new reachability algorithm for symmetric multi-processor architecture
ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
A larger lower bound on the OBDD complexity of the most significant bit of multiplication
LATIN'10 Proceedings of the 9th Latin American conference on Theoretical Informatics
Combining several paradigms for circuit validation and verification
CASSIS'04 Proceedings of the 2004 international conference on Construction and Analysis of Safe, Secure, and Interoperable Smart Devices
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
ABC: an academic industrial-strength verification tool
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
Formal verification of a SHA-1 circuit core using ACL2
TPHOLs'05 Proceedings of the 18th international conference on Theorem Proving in Higher Order Logics
Efficient symbolic simulation via dynamic scheduling, don't caring, and case splitting
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
Predictive reachability using a sample-based approach
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
A model for integrating dialogue and the execution of joint plans
ArgMAS'09 Proceedings of the 6th international conference on Argumentation in Multi-Agent Systems
Computing argumentation in polynomial number of BDD operations: a preliminary report
ArgMAS'10 Proceedings of the 7th international conference on Argumentation in Multi-Agent Systems
Exact and fully symbolic verification of linear hybrid automata with large discrete state spaces
Science of Computer Programming
| Hi-index | 0.01 |