Mechanizing programming logics in higher order logic
Current trends in hardware verification and automated theorem proving
Symbolic model checking using SAT procedures instead of BDDs
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Symbolic forward/backward traversals of large finite state machines
Journal of Systems Architecture: the EUROMICRO Journal
Circuit-based Boolean Reasoning
Proceedings of the 38th annual Design Automation Conference
Computer-Aided Reasoning: An Approach
Computer-Aided Reasoning: An Approach
Symbolic Model Checking Visualization
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
SAT-Based Verification without State Space Traversal
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Checking Safety Properties Using Induction and a SAT-Solver
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Verification of Synchronous Sequential Machines Based on Symbolic Execution
Proceedings of the International Workshop on Automatic Verification Methods for Finite State Systems
Finding Bugs in an Alpha Microprocessor Using Satisfiability Solvers
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Meta-BDDs: A Decomposed Representation for Layered Symbolic Manipulation of Boolean Functions
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Mixing Forward and Backward Traversals in Guided-Prioritized BDD-Based Verification
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
VIS: A System for Verification and Synthesis
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Hardware Verification Using PVS
Formal Hardware Verification - Methods and Systems in Comparison
Circuit Based Quantification: Back to State Set Manipulation within Unbounded Model Checking
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Stepping forward with interpolants in unbounded model checking
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Boosting the role of inductive invariants in model checking
Proceedings of the conference on Design, automation and test in Europe
Boosting interpolation with dynamic localized abstraction and redundancy removal
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Automated abstraction by incremental refinement in interpolant-based model checking
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Trading-off SAT search and variable quantifications for effective unbounded model checking
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
SATzilla: portfolio-based algorithm selection for SAT
Journal of Artificial Intelligence Research
Strengthening model checking techniques with inductive invariants
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Partitioning interpolant-based verification for effective unbounded model checking
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Speeding up model checking by exploiting explicit and hidden verification constraints
Proceedings of the Conference on Design, Automation and Test in Europe
Improving the efficiency of BDD-based operators by means of partitioning
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimization techniques for craig interpolant compaction in unbounded model checking
Proceedings of the Conference on Design, Automation and Test in Europe
Thread-based multi-engine model checking for multicore platforms
ACM Transactions on Design Automation of Electronic Systems (TODAES)
| Hi-index | 0.00 |
This paper describes a portfolio-based approach for model checking, i.e., an approach in which several model checking engines are orchestrated to reach the best possible performance on a broad and real set of designs. Model checking algorithms are evaluated through experiments, and experimental data inspire package tuning, as well as new algorithmic features and methodologies. This approach, albeit similar to several industrial and academic experiences, and already applied in other domains, is somehow new to the model checking field. Its contributions lie in the description of how we: (1) characterize and classify benchmarks in a dynamic way, throughout experimental runs, (2) relate model checking problems to algorithms and engines, (3) introduce a dynamic tuning of sub-engines, exploiting an on-the-fly performance analysis, (4) record results of different approaches, and sort out heuristics to target different classes of problems. We provide a detailed description of the experiments performed in preparation of the Model Checking Competition 2010, where PdTRAV, our academic verification tool, won the UNSAT division, while ranking second in the OVERALL category.