Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Reducing BDD size by exploiting functional dependencies
DAC '93 Proceedings of the 30th international Design Automation Conference
Formal verification using parametric representations of Boolean constraints
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
To split or to conjoin: the question in image computation
Proceedings of the 37th Annual Design Automation Conference
Early Quantification and Partitioned Transition Relations
ICCD '96 Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors
Generalized Symbolic Trajectory Evaluation - Abstraction in Action
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Verification of Synchronous Sequential Machines Based on Symbolic Execution
Proceedings of the International Workshop on Automatic Verification Methods for Finite State Systems
A Conjunctively Decomposed Boolean Representation for Symbolic Model Checking
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
VIS: A System for Verification and Synthesis
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
A SAT-based algorithm for reparameterization in symbolic simulation
Proceedings of the 41st annual Design Automation Conference
GSTE is partitioned model checking
Formal Methods in System Design
| Hi-index | 0.00 |
Symbolic techniques usually use characteristic functions for representing sets of states. Boolean functional vectors provide an alternate set representation which is suitable for symbolic simulation. Their use in symbolic reachability analysis and model checking is limited, however, by the lack of algorithms for performing set operations. We present algorithms for set union, intersection and quantification that work with a canonical Boolean functional vector representation and show how this enables efficient symbolic simulation based reachability analysis. Our experimental results for reachability analysis indicate that the Boolean functional vector representation is often more compact than the corresponding characteristic function, thus giving significant performance improvements on some benchmarks.