Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Representing circuits more efficiently in symbolic model checking
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Precise interprocedural dataflow analysis with applications to constant propagation
TAPSOFT '95 Selected papers from the 6th international joint conference on Theory and practice of software development
DAC '97 Proceedings of the 34th annual Design Automation Conference
Reachability analysis using partitioned-ROBDDs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Symbolic Model Checking
Bebop: A Symbolic Model Checker for Boolean Programs
Proceedings of the 7th International SPIN Workshop on SPIN Model Checking and Software Verification
Border-Block Triangular Form and Conjunction Schedule in Image Computation
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
VIS: A System for Verification and Synthesis
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
The Compositional Far Side of Image Computation
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Model Checking C Programs Using F-SOFT
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
F-SOFT: software verification platform
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Automatic state space decomposition for approximate FSM traversal based on circuit analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Disjunctive image computation for software verification
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Tunneling and slicing: towards scalable BMC
Proceedings of the 45th annual Design Automation Conference
Efficient SAT-based bounded model checking for software verification
Theoretical Computer Science
A new testability guided abstraction to solving bit-vector formula
SMT '08/BPR '08 Proceedings of the Joint Workshops of the 6th International Workshop on Satisfiability Modulo Theories and 1st International Workshop on Bit-Precise Reasoning
Using counterexamples for improving the precision of reachability computation with polyhedra
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Efficient state space exploration: interleaving stateless and state-based model checking
Proceedings of the International Conference on Computer-Aided Design
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Finite state models generated from software programs have unique characteristics that are not exploited by existing model checking algorithms. In this paper, we propose a novel disjunctive image computation algorithm and other simplifications based on these characteristics. Our algorithm divides an image computation into a disjunctive set of easier ones that can be performed in isolation. Hypergraph partitioning is used to minimize the number of live variables in each disjunctive component. We use the live variables to simplify transition relations and reachable state subsets. Our experiments on a set of real-world C programs show that the new algorithm achieves orders-of-magnitude performance improvement over the best known conjunctive image computation algorithm.