Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Verification of synchronous sequential machines based on symbolic execution
Proceedings of the international workshop on Automatic verification methods for finite state systems
Logic synthesis
Software scheduling in the co-synthesis of reactive real-time systems
DAC '94 Proceedings of the 31st annual Design Automation Conference
Heuristic minimization of BDDs using don't cares
DAC '94 Proceedings of the 31st annual Design Automation Conference
Synthesis of software programs for embedded control application
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Efficient latch optimization using exclusive sets
DAC '97 Proceedings of the 34th annual Design Automation Conference
Safe BDD minimization using don't cares
DAC '97 Proceedings of the 34th annual Design Automation Conference
Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Telecommunications Systems Engineering Using SDL
Telecommunications Systems Engineering Using SDL
Sequential Circuit Design Using Synthesis and Optimization
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Analysis and synthesis of concurrent digital circuits using control-flow expressions
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On the complexity of minimizing the OBDD size for incompletely specified functions
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Free MDD-based software optimization techniques for embedded systems
DATE '00 Proceedings of the conference on Design, automation and test in Europe
The Compositional Far Side of Image Computation
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
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This paper explores the use of don't cares in software synthesis for embedded systems. Embedded systems have extremely tight real-time and code/data size constraints, that make expensive optimizations desirable. We propose applying BDD minimization techniques in the presence of a don't care set to synthesize code for extended Finite State Machines from a BDD-based representation of the FSM transition function. The don't care set can be derived from local analysis (such as unused state codes or don't care inputs) as well as from external information (such as impossible input patterns). We show experimental results, discuss their implications, the interaction between BDD-based minimization and dynamic variable reordering, and propose directions for future work.