ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Automatic synthesis of interfaces between incompatible protocols
DAC '98 Proceedings of the 35th annual Design Automation Conference
Don't care-based BDD minimization for embedded software
DAC '98 Proceedings of the 35th annual Design Automation Conference
An area/time optimizing algorithm in high-level synthesis for control-based hardwares (short paper)
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Design of embedded systems: formal models, validation, and synthesis
Readings in hardware/software co-design
Automatic Generation of a Real-Time Operating System for Embedded Systems
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Conflict analysis in multiprocess synthesis for optimized system integration
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
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In this paper, we present a novel modeling style and control synthesis technique for system-level specifications that are better described as a set of concurrent descriptions, their synchronizations, and constraints. The proposed synthesis procedure considers the degrees of freedom introduced by the concurrent models and by the environment in order to satisfy the design constraints. Synthesis is divided into two phases. In the first phase, the original specification is translated into an algebraic system, for which complex control-flow constraints and quantifiers of the design are introduced. In the second phase, we translate the algebraic formulation into a finite-state representation, and we derive an optimal control-unit implementation for each individual concurrent part. In the implementation of the controllers from the finite-state representation, we use flexible objective functions, which allow designers to better control the goals of the synthesis tool, and thus incorporate as much as possible their knowledge about the environment and the design