Introduction to operations research, 4th ed.
Introduction to operations research, 4th ed.
Real time software for small systems
Real time software for small systems
Introduction to algorithms
Software scheduling in the co-synthesis of reactive real-time systems
DAC '94 Proceedings of the 31st annual Design Automation Conference
Fixed priority pre-emptive scheduling: an historical perspective
Real-Time Systems - Special issue: history of real-time systems
Allocation and Scheduling of Precedence-Related Periodic Tasks
IEEE Transactions on Parallel and Distributed Systems
The Chinook hardware/software co-synthesis system
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Behavioral synthesis: digital system design using the synopsys behavioral compiler
Behavioral synthesis: digital system design using the synopsys behavioral compiler
Formal verification of embedded systems based on CFSM networks
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
Co-Synthesis of Hardware and Software for Digital Embedded Systems
Co-Synthesis of Hardware and Software for Digital Embedded Systems
Readings in hardware/software co-design
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Performance estimation for real-time distributed embedded systems
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Analysis and synthesis of concurrent digital circuits using control-flow expressions
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimistic distributed timed cosimulation based on thread simulation model
Proceedings of the 6th international workshop on Hardware/software codesign
High-Level Embedded System Specifications Based on Process Activation Conditions
Journal of VLSI Signal Processing Systems - Special issue on system level design
Run-time HW/SW codesign for discrete event systems using dynamically reconfigurable architectures
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Codesign of embedded systems: status and trends
Readings in hardware/software co-design
Codesign of Embedded Systems: Status and Trends
IEEE Design & Test
HW/SW codesign techniques for dynamically reconfigurable architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Path-Based Edge Activation for Dynamic Run-Time Scheduling
Proceedings of the 12th international symposium on System synthesis
Modern development methods and tools for embedded reconfigurable systems: A survey
Integration, the VLSI Journal
| Hi-index | 0.00 |
We present a tool, called Clara, that performs real-time analysis and priority assignment for software tasks in a mixed hardware-software system with a custom run-time scheduler. We start from a system described in tasks/threads consisting of hardware specified in Verilog and software specified in C. We obtain the worst case execution time for each individual task. Then, based on the control flow of the application, Clara uses a dynamic programmming algorithm to automatically find optimal priorities for the software tasks assuming no interrupts. Assuming the set of software tasks runs on a microprocessor in a target architecture using a template we provide for the priority scheduler and interrupt code, Clara then finds the worst case execution time for the application with interrupts allowed. Thus, this tool brings real-time analysis to a system level for a particular run-time system. Clara helps a designer minimize the worst case execution time of a mixed hardware-software application.