Heuristic minimization of BDDs using don't cares
DAC '94 Proceedings of the 31st annual Design Automation Conference
An observability-based code coverage metric for functional simulation
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
The disjunctive decomposition of logic functions
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
A methodology for the verification of a “system on chip”
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Modeling design constraints and biasing in simulation using BDDs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
An algorithm for bi-decomposition of logic functions
Proceedings of the 38th annual Design Automation Conference
A Conjunctively Decomposed Boolean Representation for Symbolic Model Checking
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
A new decomposition method for multilevel circuit design
EURO-DAC '91 Proceedings of the conference on European design automation
Constraint synthesis for environment modeling in functional verification
Proceedings of the 40th annual Design Automation Conference
A Framework for Constrained Functional Verification
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Random stimulus generation using entropy and XOR constraints
Proceedings of the conference on Design, automation and test in Europe
SAT-based semiformal verification of hardware
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
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We present an algorithm for simplifying the solution of conjunctive Boolean constraints of state and input variables, in the context of constrained random vector generation using BDDs. The basis of our approach is extraction of "hold-constraints" from constraint system. Hold-constraints are deterministic and trivially resolvable; in addition, they can be used to simplify the original constraints as well as refine the conjunctive partition. Experiments demonstrate significant reduction in the time and space needed for constructing the conjunction BDDs, and the time spent in vector generation during simulation.