A Framework for Constrained Functional Verification

  • Authors:
  • Jun Yuan;Carl Pixley;Adnan Aziz;Ken Albin

  • Affiliations:
  • Verplex Systems, Milpitas, CA;Synopsys, Hillsboro, OR;University of Texas at Austin;Motorola Inc., Austin, TX

  • Venue:
  • Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
  • Year:
  • 2003

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Abstract

We describe a framework for constrained simulation-vector generationin an industry setting. The framework consists of two keycomponents: the constraint compiler and the vector generator. Theconstraint compiler employs various techniques, including prioritization,partitioning, extraction, and decomposition, to minimize theinternal representation of the constraints, and thus the complexityof constraint solving. The vector generator then uses the compileddata together with input biasing to generate random simulation vectors.Constraints and input biases are treated in a unified manner inthe vector generator. Although there are many alternative ways ofgenerating vectors from constraints, the framework uniquely suits apractical constrained verification environment because of its abilityto handle complicated constraints and its seamless treatment of constraintsand biases. We illustrate the effectiveness of the frameworkwith real examples from commercial designs.