Using Formal Specifications for Functional Validation of Hardware Designs
IEEE Design & Test
Simplifying Circuits for Formal Verification Using Parametric Representation
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Combinational equivalence checking through function transformation
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Constraint synthesis for environment modeling in functional verification
Proceedings of the 40th annual Design Automation Conference
A Framework for Constrained Functional Verification
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Supporting sequential assumptions in hybrid verification
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Scalable compositional minimization via static analysis
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Interactive presentation: Automatic hardware synthesis from specifications: a case study
Proceedings of the conference on Design, automation and test in Europe
Specify, Compile, Run: Hardware from PSL
Electronic Notes in Theoretical Computer Science (ENTCS)
Stimulus generation for constrained random simulation
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Interpolating functions from large Boolean relations
Proceedings of the 2009 International Conference on Computer-Aided Design
Anzu: a tool for property synthesis
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Learning from Constraints for Formal Property Checking
Journal of Electronic Testing: Theory and Applications
PLDI '10 Proceedings of the 2010 ACM SIGPLAN conference on Programming language design and implementation
Synthesis for regular specifications over unbounded domains
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
Synthesis of Reactive(1) designs
Journal of Computer and System Sciences
Formal Methods in System Design
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
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