Tree automata, Mu-Calculus and determinacy
SFCS '91 Proceedings of the 32nd annual symposium on Foundations of computer science
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
An improved algorithm for the evaluation of fixpoint expressions
Theoretical Computer Science
Fair Simulation Relations, Parity Games, and State Space Reduction for Büchi Automata
ICALP '01 Proceedings of the 28th International Colloquium on Automata, Languages and Programming,
Small Progress Measures for Solving Parity Games
STACS '00 Proceedings of the 17th Annual Symposium on Theoretical Aspects of Computer Science
Building Circuits from Relations
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Fast LTL to Büchi Automata Translation
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
NuSMV 2: An OpenSource Tool for Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
The common fragment of CTL and LTL
FOCS '00 Proceedings of the 41st Annual Symposium on Foundations of Computer Science
Experiments with deterministic ω-automata for formulas of linear temporal logic
Theoretical Computer Science - Implementation and application of automata
Interactive presentation: Automatic hardware synthesis from specifications: a case study
Proceedings of the conference on Design, automation and test in Europe
Specify, Compile, Run: Hardware from PSL
Electronic Notes in Theoretical Computer Science (ENTCS)
An Antichain Algorithm for LTL Realizability
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
An accelerated algorithm for 3-color parity games with an application to timed games
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Anzu: a tool for property synthesis
CAV'07 Proceedings of the 19th international conference on Computer aided verification
The common fragment of ACTL and LTL
FOSSACS'08/ETAPS'08 Proceedings of the Theory and practice of software, 11th international conference on Foundations of software science and computational structures
Compositional algorithms for LTL synthesis
ATVA'10 Proceedings of the 8th international conference on Automated technology for verification and analysis
Generalized rabin(1) synthesis with applications to robust system synthesis
NFM'11 Proceedings of the Third international conference on NASA Formal methods
Unbeast: symbolic bounded synthesis
TACAS'11/ETAPS'11 Proceedings of the 17th international conference on Tools and algorithms for the construction and analysis of systems: part of the joint European conferences on theory and practice of software
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
Robustness in the presence of liveness
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
Synthesis of reactive(1) designs
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
Minimising deterministic Büchi automata precisely using SAT solving
SAT'10 Proceedings of the 13th international conference on Theory and Applications of Satisfiability Testing
| Hi-index | 0.00 |
We study the synthesis problem for specifications of the common fragment of ACTL (computation tree logic with only universal path quantification) and LTL (linear-time temporal logic). Key to this setting is a novel construction for translating properties from LTL to very-weak automata, whenever possible. Such automata are structurally simple and thus amenable to optimizations as well as symbolic implementations. Based on this novel construction, we describe a synthesis approach that inherits the efficiency of generalized reactivity(1) synthesis [27], but is significantly richer in terms of expressivity.