Model Checking of Safety Properties
Formal Methods in System Design
Fast LTL to Büchi Automata Translation
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
NuSMV 2: An OpenSource Tool for Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Specify, Compile, Run: Hardware from PSL
Electronic Notes in Theoretical Computer Science (ENTCS)
An Antichain Algorithm for LTL Realizability
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
ATVA'07 Proceedings of the 5th international conference on Automated technology for verification and analysis
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
Acacia+, a tool for LTL synthesis
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
MGSyn: automatic synthesis for industrial automation
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
ATVA'12 Proceedings of the 10th international conference on Automated Technology for Verification and Analysis
ALLQBF solving by computational learning
ATVA'12 Proceedings of the 10th international conference on Automated Technology for Verification and Analysis
Fair Synthesis for Asynchronous Distributed Systems
ACM Transactions on Computational Logic (TOCL)
PARTY: parameterized synthesis of token rings
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
Synthesis of hierarchical systems
Science of Computer Programming
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We present Unbeast v.0.6, a tool for synthesising finitestate systems from specifications written in linear-time temporal logic (LTL). We combine bounded synthesis, specification splitting and symbolic game solving with binary decision diagrams (BDDs), which allows tackling specifications that previous tools were typically unable to handle. In case of realizability of a given specification, our tool computes a prototype implementation in a fully symbolic way, which is especially beneficial for settings with many input and output bits.