AVPGEN—a test generator for architecture verification
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Test program generation for functional verification of PowerPC processors in IBM
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
User defined coverage—a tool supported methodology for design verification
DAC '98 Proceedings of the 35th annual Design Automation Conference
Verification of configurable processor cores
Proceedings of the 37th Annual Design Automation Conference
Simplifying Boolean constraint solving for random simulation-vector generation
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Combining System Level Modeling with Assertion Based Verification
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
How an "incoherent behavior" inside generic hardware component characterizes functional errors
AIKED'09 Proceedings of the 8th WSEAS international conference on Artificial intelligence, knowledge engineering and data bases
Co-simulation and communication synthesis approach for intellectual properties based SoCs
Computers and Electrical Engineering
Optimized temporal monitors for SystemC
RV'10 Proceedings of the First international conference on Runtime verification
Optimized temporal monitors for SystemC
Formal Methods in System Design
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