Revisiting resistance speeds up I/O-efficient LTL model checking

  • Authors:
  • J. Barnat;L. Brim;P. Šimeček;M. Weber

  • Affiliations:
  • Masaryk University Brno, Czech Republic;Masaryk University Brno, Czech Republic;Masaryk University Brno, Czech Republic;University of Twente, The Netherlands

  • Venue:
  • TACAS'08/ETAPS'08 Proceedings of the Theory and practice of software, 14th international conference on Tools and algorithms for the construction and analysis of systems
  • Year:
  • 2008

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Abstract

Revisiting resistant graph algorithms are those, whose correctness is not vulnerable to repeated edge exploration. Revisiting resistant I/O efficient graph algorithms exhibit considerable speed-up in practice in comparison to nonrevisiting resistant algorithms. In the paper we present a new revisiting resistant I/O efficient LTL model checking algorithm. We analyze its theoretical I/O complexity and we experimentally compare its performance to already existing I/O efficient LTL model checking algorithms.