Communicating sequential processes
Communicating sequential processes
The complexity of Boolean functions
The complexity of Boolean functions
Characterizing finite Kripke structures in propositional temporal logic
Theoretical Computer Science - International Joint Conference on Theory and Practice of Software Development, P
On the development of reactive systems
Logics and models of concurrent systems
Handbook of theoretical computer science (vol. B)
The temporal logic of reactive and concurrent systems
The temporal logic of reactive and concurrent systems
Automatic functional test generation using the extended finite state machine model
DAC '93 Proceedings of the 30th international Design Automation Conference
Formally verifying a microprocessor using a simulation methodology
DAC '94 Proceedings of the 31st annual Design Automation Conference
Efficient generation of counterexamples and witnesses in symbolic model checking
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Architecture validation for processors
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Validation coverage analysis for complex digital designs
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
An observability-based code coverage metric for functional simulation
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Abstraction Techniques for Validation Coverage Analysis and Test Generation
IEEE Transactions on Computers
DAC '98 Proceedings of the 35th annual Design Automation Conference
Coverage estimation for symbolic model checking
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Simulation vector generation from HDL descriptions for observability-enhanced statement coverage
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Checking that finite state concurrent programs satisfy their linear specification
POPL '85 Proceedings of the 12th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Model checking
An automata-theoretic approach to branching-time model checking
Journal of the ACM (JACM)
Improving coverage analysis and test generation for large designs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Logic Synthesis and Verification Algorithms
Logic Synthesis and Verification Algorithms
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Vacuity Detection in Temporal Model Checking
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Specification and verification of concurrent systems in CESAR
Proceedings of the 5th Colloquium on International Symposium on Programming
Efficient Detection of Vacuity in ACTL Formulas
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
A Practical Approach to Coverage in Model Checking
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Dos and don'ts of CTL state coverage estimation
Proceedings of the 40th annual Design Automation Conference
Formal verification coverage: computing the coverage gap between temporal specifications
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Word level functional coverage computation
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Coverage metrics for requirements-based testing
Proceedings of the 2006 international symposium on Software testing and analysis
Safety and Software Intensive Systems: Challenges Old and New
FOSE '07 2007 Future of Software Engineering
Properties Incompleteness Evaluation by Functional Verification
IEEE Transactions on Computers
Estimating functional coverage in bounded model checking
Proceedings of the conference on Design, automation and test in Europe
Too Few or Too Many Properties? Measure it by ATPG!
Journal of Electronic Testing: Theory and Applications
What causes a system to satisfy a specification?
ACM Transactions on Computational Logic (TOCL)
Finding Minimal Unsatisfiable Cores of Declarative Specifications
FM '08 Proceedings of the 15th international symposium on Formal Methods
Design intent coverage revisited
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Formal Methods in System Design
A theory of mutations with applications to vacuity, coverage, and fault tolerance
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
A Framework for Inherent Vacuity
HVC '08 Proceedings of the 4th International Haifa Verification Conference on Hardware and Software: Verification and Testing
Simulation vs. formal: absorb what is useful; reject what is useless
HVC'07 Proceedings of the 3rd international Haifa verification conference on Hardware and software: verification and testing
TAP'08 Proceedings of the 2nd international conference on Tests and proofs
Coverage in interpolation-based model checking
Proceedings of the 47th Design Automation Conference
Sanity checks in formal verification
CONCUR'06 Proceedings of the 17th international conference on Concurrency Theory
Checking sanity of software requirements
SEFM'12 Proceedings of the 10th international conference on Software Engineering and Formal Methods
Completeness-driven development
ICGT'12 Proceedings of the 6th international conference on Graph Transformations
A guiding coverage metric for formal verification
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
From model checking to model measuring
CONCUR'13 Proceedings of the 24th international conference on Concurrency Theory
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In formal verification, we verify that a system is correct with respect to a specification. Even when the system is proven to be correct, there is still a question of how complete the specification is, and whether it really covers all the behaviors of the system. In this paper we study coverage metrics for model checking. Coverage metrics are based on modifications we apply to the system in order to check which parts of it were actually relevant for the verification process to succeed. We introduce two principles that we believe should be part of any coverage metric for model checking: a distinction between state-based and logic-based coverage, and a distinction between the system and its environment. We suggest several coverage metrics that apply these principles, and we describe two algorithms for finding the uncovered parts of the system under these definitions. The first algorithm is a symbolic implementation of a naive algorithm that model checks many variants of the original system. The second algorithm improves the naive algorithm by exploiting overlaps in the variants. We also suggest a few helpful outputs to the user, once the uncovered parts are found.