Formal verification coverage: computing the coverage gap between temporal specifications

Authors:
A. Das;P. Basu;A. Banerjee;P. Dasgupta;P. P. Chakrabarti;C. Rama Mohan;L. Fix;R. Armoni
Affiliations:
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India;Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India;Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India;Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India;Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India;Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., PA, USA;-;-
Venue:
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Year:
2004

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Abstract

Existing methods for formal verification coverage compare a given specification with a given implementation, and evaluate the coverage gap in terms of quantitative metrics. We consider a new problem, namely to compare two formal temporal specifications and to find a set of additional temporal properties that close the coverage gap between the two specifications. In this paper we present: (1) the problem definition and motivation, (2) a methodology for computing the coverage gap between specifications, and (3) a methodology for representing the coverage gap as a collection of temporal properties that preserve the syntactic structure of the target specification.