On the synthesis of a reactive module
POPL '89 Proceedings of the 16th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
On the power of bounded concurrency I: finite automata
Journal of the ACM (JACM)
Efficient generation of counterexamples and witnesses in symbolic model checking
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Checking that finite state concurrent programs satisfy their linear specification
POPL '85 Proceedings of the 12th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Enhancing model checking in verification by AI techniques
Artificial Intelligence
Simplifying and Isolating Failure-Inducing Input
IEEE Transactions on Software Engineering
From symptom to cause: localizing errors in counterexample traces
POPL '03 Proceedings of the 30th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Fate and Free Will in Error Traces
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Specification and verification of concurrent systems in CESAR
Proceedings of the 5th Colloquium on International Symposium on Programming
NuSMV 2: An OpenSource Tool for Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
An Enhanced Cut-points Algorithm in Formal Equivalence Verification
HLDVT '01 Proceedings of the Sixth IEEE International High-Level Design Validation and Test Workshop (HLDVT'01)
Programming by sketching for bit-streaming programs
Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
Industrial Strength SAT-based Alignability Algorithm for Hardware Equivalence Verification
FMCAD '07 Proceedings of the Formal Methods in Computer Aided Design
The temporal logic of programs
SFCS '77 Proceedings of the 18th Annual Symposium on Foundations of Computer Science
Reasoning about infinite computation paths
SFCS '83 Proceedings of the 24th Annual Symposium on Foundations of Computer Science
DESIGN AND SYNTHESIS OF SYNCHRONIZATION SKELETONS USING BRANCHING TIME TEMPORAL LOGIC
25 Years of Model Checking
ICALP '08 Proceedings of the 35th international colloquium on Automata, Languages and Programming, Part II
Automatic generation of local repairs for Boolean programs
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Tighter Bounds for the Determinisation of Büchi Automata
FOSSACS '09 Proceedings of the 12th International Conference on Foundations of Software Science and Computational Structures: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009
Inferring Synchronization under Limited Observability
TACAS '09 Proceedings of the 15th International Conference on Tools and Algorithms for the Construction and Analysis of Systems: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009,
Abstraction-guided synthesis of synchronization
Proceedings of the 37th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
What went wrong: explaining counterexamples
SPIN'03 Proceedings of the 10th international conference on Model checking software
Proceedings of the 33rd International Conference on Software Engineering
Journal of Computer and System Sciences
Repair of boolean programs with an application to c
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Revising UNITY programs: possibilities and limitations
OPODIS'05 Proceedings of the 9th international conference on Principles of Distributed Systems
Fixing Design Errors With Counterexamples and Resynthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Synthesis modulo recursive functions
Proceedings of the 2013 ACM SIGPLAN international conference on Object oriented programming systems languages & applications
| Hi-index | 0.00 |
We present a new and flexible approach to repair reactive programs with respect to a specification. The specification is given in linear-temporal logic. Like in previous approaches, we aim for a repaired program that satisfies the specification and is syntactically close to the faulty program. The novelty of our approach is that it produces a program that is also semantically close to the original program by enforcing that a subset of the original traces is preserved. Intuitively, the faulty program is considered to be a part of the specification, which enables us to synthesize meaningful repairs, even for incomplete specifications. Our approach is based on synthesizing a program with a set of behaviors that stay within a lower and an upper bound. We provide an algorithm to decide if a program is repairable with respect to our new notion, and synthesize a repair if one exists. We analyze several ways to choose the set of traces to leave intact and show the boundaries they impose on repairability. We have evaluated the approach on several examples.