Computing the maximum power cycles of a sequential circuit
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
High-density reachability analysis
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Using complete-1-distinguishability for FSM equivalence checking
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Latch optimization in circuits generated from high-level descriptions
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Efficient latch optimization using exclusive sets
DAC '97 Proceedings of the 34th annual Design Automation Conference
Record & play: a structural fixed point iteration for sequential circuit verification
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Hybrid verification using saturated simulation
DAC '98 Proceedings of the 35th annual Design Automation Conference
Auxiliary variables for BDD-based representation and manipulation of Boolean functions
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Symbolic reachability analysis of large finite state machines using don't cares
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Iterative abstraction-based CTL model checking
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Formal Methods in System Design
Rarity based guided state space search
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
Using complete-1-distinguishability for FSM equivalence checking
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Sequential Permissible Functions and their Application to Circuit Optimization
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Exploiting Functional Dependencies in Finite State Machine Verification
EDTC '96 Proceedings of the 1996 European conference on Design and Test
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