Introduction to algorithms
High-level Petri nets: theory and application
High-level Petri nets: theory and application
Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
Coloured Petri nets: basic concepts, analysis methods and practical use, vol. 2
Coloured Petri nets: basic concepts, analysis methods and practical use, vol. 2
Partial-Order Methods for the Verification of Concurrent Systems: An Approach to the State-Explosion Problem
POPL '83 Proceedings of the 10th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
Analysing Concurrent Systems Using the Concurrency Workbench
Functional Programming, Concurrency, Simulation and Automated Reasoning: International Lecture Series 1991-1992, McMaster University, Hamilton, Ontario, Canada
Exploiting Symmetry In Temporal Logic Model Checking
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Generation of Reduced Models for Checking Fragments of CTL
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Utilizing Symmetry when Model Checking under Fairness Assumptions: An Automata-theoretic Approach
Proceedings of the 7th International Conference on Computer Aided Verification
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Better Verification Through Symmetry
CHDL '93 Proceedings of the 11th IFIP WG10.2 International Conference sponsored by IFIP WG10.2 and in cooperation with IEEE COMPSOC on Computer Hardware Description Languages and their Applications
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Efficient On-the-Fly Model Checking for CTL
LICS '95 Proceedings of the 10th Annual IEEE Symposium on Logic in Computer Science
Combining Symmetry Reduction and Under-Approximation for Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Symmetry and reduced symmetry in model checking
ACM Transactions on Programming Languages and Systems (TOPLAS)
Symmetry in temporal logic model checking
ACM Computing Surveys (CSUR)
Combining symmetry reduction and under-approximation for symbolic model checking
Formal Methods in System Design
25 Years of Model Checking
Non-interference properties for data-type reduction of communicating systems
IFM'07 Proceedings of the 6th international conference on Integrated formal methods
Symmetry reduction in SAT-based model checking
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Localized fairness: a rewriting semantics
RTA'05 Proceedings of the 16th international conference on Term Rewriting and Applications
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An on-the-fly algorithm for model checking under fairness is presented. The algorithm utilizes symmetry in the program to reduce the state space, and employs novel techniques that make the on-the-fly model checking feasible. The algorithm uses state symmetry and eliminates parallel edges in the reachability graph. Experimental results demonstrating dramatic reductions in both the running time and memory usage are presented.