Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Shared binary decision diagram with attributed edges for efficient Boolean function manipulation
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
The Inversion Algorithm for digital simulation
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Fast discrete function evaluation using decision diagrams
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Fast functional simulation using branching programs
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Logic synthesis for a single large look-up table
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
A method to decompose multiple-output logic functions
Proceedings of the 41st annual Design Automation Conference
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This paper shows a new type of a cycle-based logic simulation method using a Look-Up Table (LUT) cascade emulator. The method first transforms a given circuit into LUT cascades through BDD (Binary Decision Diagram). Then, it stores LUT data to the memory of an LUT cascade emulator. Next, it generates the C code representing the control circuit of the LUT cascade emulator. And, finally, it converts the C code into the execution code. This method is compared with a Levelized Compiled Code (LCC) simulator with respect to the simulation time and setup time. Although we used standard PC to simulate the circuit, experimental results show that this method is 12-64 times faster than the LCC.